Fabric vectors for deep learning acceleration

A method comprising:

• decoding a fabric vector instruction in a sending processing element, the fabric vector instruction comprising an operation and an instruction destination operand specifying a destination operand descriptor stored in a register of the sending processing element, the register addressable via instruction execution by the sending processing element;
• type-determining that the instruction destination operand is a fabric vector, as specified by the destination operand descriptor, the destination operand descriptor enabled to specify one of at least the fabric vector and a memory vector;
• responsive to the type-determining that the instruction destination operand is a fabric vector, associating a virtual output queue and a respective transmit virtual channel with the fabric vector, the transmit virtual channel specified by the destination operand descriptor;
• performing an iteration of the operation producing a number of output data elements;
• writing at least one fabric packet comprising the number of output data elements to the virtual output queue;
• and
• transmitting the at least one fabric packet from the virtual output queue via a fabric and in accordance with the transmit virtual channel.

A system comprising:

• means for decoding a fabric vector instruction in a receiving processing element, the fabric vector instruction comprising an operation and an instruction source operand specifying a source operand descriptor stored in a register of the receiving processing element, the register addressable via instruction execution by the receiving processing element;
• means for type-determining that the instruction source operand is a fabric vector, as specified by the source operand descriptor, the source operand descriptor enabled to specify one of at least the fabric vector and a memory vector;
• means for associating a virtual input queue and a respective receive virtual channel with the fabric vector, the means for associating being responsive to the type-determining that the instruction source operand is a fabric vector;
• means for receiving at least one fabric packet comprising a number of input data elements of the fabric vector in the virtual input queue via a fabric and in accordance with the receive virtual channel;
• means for selectively reading the number of input data elements from the virtual input queue;
• and
• means for selectively performing an iteration of the operation using the number of input data elements.

A system comprising:

• means for decoding a fabric vector instruction in a sending processing element, the fabric vector instruction comprising an operation and an instruction destination operand specifying a destination operand descriptor stored in a register of the sending processing element, the register addressable via instruction execution by the sending processing element;
• means for type-determining that the instruction destination operand is a fabric vector, as specified by the destination operand descriptor, the destination operand descriptor enabled to specify one of at least the fabric vector and a memory vector;
• means for associating a virtual output queue and a respective transmit virtual channel with the fabric vector, the transmit virtual channel specified by the destination operand descriptor, the means for associating being responsive to the means for type-determining that the instruction destination operand is a fabric vector;
• means for performing an iteration of the operation producing a number of output data elements;
• means for writing at least one fabric packet comprising the number of output data elements to the virtual output queue;
• and
• means for transmitting the at least one fabric packet from the virtual output queue via a fabric and in accordance with the transmit virtual channel.