Adaptable dynamic region for hardware acceleration
AssigneeXilinx, Inc.
InventorsJulian M. Kain, Adam P. Donlin
Life of this patent
Estimating the term…
Abstract
Creating an adaptable dynamic region for hardware acceleration can include receiving a first kernel for inclusion in a circuit design for an integrated circuit of an accelerator platform. The circuit design includes a dynamic design corresponding to a dynamic region of programmable circuitry in the integrated circuit that couples to a static region of the programmable circuitry. The first kernel can be included in the within the dynamic design. A global resource used by the first kernel can be determined. An interconnect architecture for the dynamic design can be constructed based on the global resource used by the first kernel.
Claims20
A method comprising:
- including, using computer hardware, a user-specified kernel within a circuit design for an integrated circuit of an accelerator platform, wherein the circuit design includes a static portion that is placed and routed and a dynamic portion configured to implement user circuitry in a dynamic region of programmable circuitry in the integrated circuit;
- wherein the dynamic region of programmable circuitry couples to a static region of programmable circuitry corresponding to the static portion, and the kernel is instantiated in the dynamic portion;
- determining, using the computer hardware, one or more global resources of the accelerator platform used by the kernel by detecting one or more address regions corresponding to the one or more global resources mapped to the kernel;
- and
- constructing, using the computer hardware, an interconnect circuit architecture in the dynamic portion of the circuit design that connects the kernel to the one or more global resources by creating instances of circuit structures based on the address regions mapped to the kernel.
A system, comprising:
- a processor configured to initiate operations including:
- including a user-specified kernel within a circuit design for an integrated circuit of an accelerator platform, wherein the circuit design includes a static portion that is placed and routed and a dynamic portion configured to implement user circuitry in a dynamic region of programmable circuitry in the integrated circuit;
- wherein the dynamic region of programmable circuitry couples to a static region of programmable circuitry corresponding to the static portion, and the kernel is instantiated in the dynamic portion;
- determining one or more global resources of the accelerator platform used by the kernel by detecting one or more address regions corresponding to the one or more global resources mapped to the kernel;
- and
- constructing an interconnect circuit architecture in the dynamic portion of the circuit design that connects the kernel to the one or more global resources by creating instances of circuit structures based on the address regions mapped to the kernel.
A computer program product, comprising:
- one or more computer readable storage media, and program instructions collectively stored on the one or more computer readable storage media, wherein the program instructions are executable by computer hardware to initiate operations including:
- including a user-specified kernel within a circuit design for an integrated circuit of an accelerator platform, wherein the circuit design includes a static portion that is placed and routed and a dynamic portion configured to implement user circuitry in a dynamic region of programmable circuitry in the integrated circuit;
- wherein the dynamic region of programmable circuitry couples to a static region of programmable circuitry corresponding to the static portion, and the kernel is instantiated in the dynamic portion;
- determining one or more global resources of the accelerator platform used by the kernel by detecting one or more address regions corresponding to the one or more global resources mapped to the kernel;
- and
- constructing an interconnect circuit architecture in the dynamic portion of the circuit design that connects the kernel to the one or more global resources by creating instances of circuit architectures based on the address regions mapped to the kernel.
Dependencies are inferred from the claim text.