System and method for vector communication

One or more tangible, non-transitory computer-readable mediums having stored thereon executable instructions for instructing a processor to:

• communicatively couple to a peripheral component interconnect express (PCIe) interconnect via an electrical interface;
• and
• provide an interface vector engine to:
• receive a first scalar transaction for the electrical interface, wherein the first scalar transaction is a first PCIe direct memory access (DMA) descriptor;
• determine that the first scalar transaction meets a criterion for vectorization, wherein the criterion includes at least identifying two or more scalar transactions of the same size;
• receive a second scalar transaction for the electrical interface, wherein the second scalar transaction is a second PCIe DMA descriptor;
• determine that the second scalar transaction meets the criterion for vectorization, including determining that the second scalar transaction is of the same size as the first scalar transaction;
• vectorize the first scalar transaction and second scalar transaction into a vector transaction;
• and
• send the vector transaction via the electrical interface.

An interconnect controller, comprising:

• a mechanical and electrical interface to a peripheral component interconnect express (PCIe) interconnect;
• and
• circuitry to:
• receive a vector memory message via the interconnect;
• convert the vector memory message into a plurality of scalar memory messages, wherein the scalar memory messages are first and second PCIe direct memory access (DMA) descriptors of uniform size;
• and
• send the scalar memory messages via the interconnect.