Controller and memory system including the same
AssigneeSK hynix Inc.
InventorsJoung Young Lee, Dong Sop Lee
Life of this patent
Estimating the term…
Abstract
A controller and a memory system including the same are disclosed. The controller receives a write command for storing write data, which is stored in at least one among a plurality of memory regions included in a host memory, in a nonvolatile memory device, generates a host memory map table by mapping virtual addresses to host memory physical addresses corresponding to the at least one memory region, and transmits the write data stored in the at least one memory region to the nonvolatile memory device by converting the virtual addresses into the host memory physical addresses based on the host memory map table.
Claims20
A memory system comprising:
- a nonvolatile memory device;
- and
- a controller configured to control the nonvolatile memory device,
- wherein the controller is further configured to:
- receive a write command for storing write data, currently stored in at least one memory region among a plurality of memory regions in a host memory, in the nonvolatile memory device, generate a host memory map table by mapping virtual addresses to host memory physical addresses corresponding to the at least one memory region, and
- transmit the write data to the nonvolatile memory device from the host memory based on the host memory map table,
- wherein the controller identifies the at least one memory region in the host memory with reference to the host memory physical addresses.
A controller which controls a nonvolatile memory device, the controller comprising:
- a first interface configured to perform data communication with a host;
- a second interface configured to perform data communication with the nonvolatile memory device;
- and
- a processor configured to control operations of the first and second interfaces,
- wherein the first interface receives, from the host, a write command for storing write data, which is currently stored in at least one among a plurality of memory regions in a host memory,
- wherein the processor generates access information corresponding to host memory physical addresses, which respectively correspond to a plurality of sub memory regions within the at least one memory region, each of the plurality of sub memory regions having a set size, in response to the received write command, and
- wherein the second interface transmits the write data to the nonvolatile memory device from the host memory based on the access information,
- wherein the controller identifies the sub memory regions in the host memory with reference to the host memory physical addresses.
A controller which controls a nonvolatile memory device, the controller comprising:
- a first interface configured to receive, from a host, a write command for storing write data, which is currently stored in at least one memory region among a plurality of memory regions in a host memory;
- a first processor configured to generate a host memory map table by mapping virtual addresses to host memory physical addresses corresponding to the at least one memory region;
- a second interface configured to transmit the write data, stored in the at least one memory region, to the nonvolatile memory device;
- and
- a second processor configured to control the second interface to access the at least one memory region based on the host memory map table,
- wherein the controller identifies the at least one memory region in the host memory with reference to the host memory physical addresses.
Dependencies are inferred from the claim text.