Synchronous hardware event collection

An event collection system for collecting event data about neural network computations for a neural network having multiple neural network layers, the system comprising:

• one or more processing devices;
• and
• one or more non-transitory machine-readable storage devices for storing instructions that are executable by the one or more processing devices to cause performance of operations comprising:
• executing program code to perform the neural network computations using components of a processor configured to implement the neural network;
• wherein the processor comprises a global time counter, and each of the components of the processor includes a respective local time counter;
• wherein the global time counter and the respective local time counters each includes at least one respective offset bit used for decreasing phase variations between the global time counter and one or more of the respective local time counters;
• wherein the program code includes a first time parameter as a trigger condition for triggering a trace event across two or more components of the processor during performance of the neural network computations;
• synchronizing, using the at least one respective offset bit of each respective local time counter in two or more of the components of the processor, respective current time values indicated by the respective local time counters based on a current time value indicated by the global time counter;
• determining, by comparing the synchronized respective current time values against the first time parameter in the program code, if the trigger condition for triggering the trace event is satisfied;
• in response to determining that the trigger condition is satisfied, triggering the trace event to generate event data for the two or more of the components of the processor;
• wherein the event data is synchronized based on the synchronized respective current time values according to the global time counter;
• and
• providing the event data to a host used to analyze the program code during performance of the neural network computations.

One or more non-transitory machine-readable storage devices for storing instructions that are executable by one or more processing devices to cause performance of operations for collecting event data about neural network computations for a neural network having multiple neural network layers, the operations comprising:

• executing program code to perform the neural network computations using components of a processor configured to implement the neural network;
• wherein the processor comprises a global time counter, and each of the components of the processor includes a respective local time counter;
• wherein the global time counter and the respective local time counters each includes at least one respective offset bit used for decreasing phase variations between the global time counter and one or more of the respective local time counters;
• wherein the program code includes a first time parameter as a trigger condition for triggering a trace event across two or more components of the processor during performance of the neural network computations;
• synchronizing, using the at least one respective offset bit of each respective local time counter in two or more of the components of the processor, respective current time values indicated by the respective local time counters based on a current time value indicated by the global time counter;
• determining, by comparing the synchronized respective current time values against the first time parameter in the program code, if the trigger condition for triggering the trace event is satisfied;
• in response to determining that the trigger condition is satisfied, triggering the trace event to generate event data for the two or more of the components of the processor;
• wherein the event data is synchronized based on the synchronized respective current time values according to the global time counter;
• and
• providing the event data to a host used to analyze the program code during performance of the neural network computations.