Dedicated design for testability paths for memory sub-system controller
AssigneeMicron Technology, Inc.
InventorMichael Richard Spica
Life of this patent
Estimating the term…
Abstract
Command execution data is received. The command execution data comprises a block address corresponding to an functional component, a register identifier corresponding to a design for testability (DFT) register of the functional component, and command data. The command execution data is converted to a serial command. The serial command is committed to the DFT register of the functional component. A response to the serial command is received. The response is generated by the functional component based on the serial command. The response is converted to command response data and is provided to a testing sub-system.
Claims20
A memory sub-system controller comprising:
- a plurality of functional components, each functional component being associated with a unique block address;
- and
- a processing device operatively connected to the plurality of functional components via a two-wire connection, the processing device to perform operations comprising:
- receiving command execution data from a testing sub-system, the command execution data comprising a block address that identifies a target functional component from among the plurality of functional components, a register identifier that identifies a design for testability (DFT) register from among a set of DFT registers in the target functional component, and command data;
- converting the command execution data to a serial command;
- committing the serial command to the DFT register of the target functional component corresponding to the block address based on the register identifier;
- receiving a response to the serial command generated by the target functional component based on the serial command;
- converting the response to command response data;
- and
- providing the command response data to the testing sub-system.
A method comprising:
- receiving, at a serial interface component of a memory sub-system controller, command execution data from a testing sub-system of the memory sub-system controller, the command execution data comprising:
- a block address identifying a target functional component from among a plurality of functional components of the memory sub-system controller connected to the serial interface component via a two-wire connection, the target functional component comprising a set of design for testability (DFT) registers;
- a register identifier identifying a DFT register from among the set of DFT registers, and command data;
- converting the command execution data to a serial command;
- committing the serial command to the DFT register of the target functional component corresponding to the block address based on the register identifier;
- receiving a response to the serial command generated by the target functional component based on the serial command;
- converting the response to command response data;
- and
- providing the command response data to the test sub-system.
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, configure the processing device to perform operations comprising:
- receiving, at a serial interface component of a memory sub-system controller, command execution data from a testing sub-system of the memory sub-system controller, the command execution data comprising:
- a block address identifying a target functional component from among a plurality of functional components connected to the serial interface component via a two-wire connection, the target functional component comprising a set of design for testability (DFT) registers;
- a register identifier that identifies a DFT register from among the set of DFT registers, and command data;
- converting the command execution data to a serial command;
- committing the serial command to the DFT register of the target functional component corresponding to the block address based on the register identifier;
- receiving a response to the serial command generated by the target functional component based on the serial command;
- converting the response to command response data;
- and
- providing the command response data to the test sub-system.
Dependencies are inferred from the claim text.