Augmenting an integrated circuit (IC) design simulation model to improve performance during verification
AssigneeSynopsys, Inc.
InventorAdam D. Cron
Life of this patent
Estimating the term…
Abstract
An augmented simulation model can be created of an integrated circuit (IC) design by inserting a switch in a simulation model of the IC design between an output of a scan cell and an input of a combinational logic cloud. A simulation enable signal can be used to control the switch. Next, an IC design simulation environment can be generated based on the augmented simulation model. The IC design can be verified by using the IC design simulation environment. The simulation enable signal can be activated when the combinational logic cloud is desired to be simulated by the IC design simulation environment.
Claims19
A method, comprising:
- creating an augmented simulation model of an integrated circuit (IC) design by inserting a switch in a simulation model of the IC design between an output of a scan cell and an input of a combinational logic cloud, wherein a simulation enable signal is used to control the switch, wherein the IC design includes scan chains, wherein each scan chain includes one or more scan cells, wherein a scan enable signal is used to scan in or scan out data in the scan chains, wherein the switch provides the output of the scan cell to the input of the combinational logic cloud when the simulation enable signal is active, and wherein the switch provides an indeterminate value to the input of the combinational logic cloud when the simulation enable signal is inactive;
- generating, by a processor, an IC design simulation environment based on the augmented simulation model;
- and
- verifying the IC design by using the IC design simulation environment, wherein the simulation enable signal is activated when the combinational logic cloud is desired to be simulated by the IC design simulation environment.
A non-transitory storage medium storing instructions that, when executed by a processor, cause the processor to:
- identify an output of a scan cell in a simulation model of an integrated circuit (IC) design, wherein the output of the scan cell is electrically coupled to an input of a combinational logic cloud;
- and
- insert a switch in the simulation model of the IC design between the output of the scan cell and the input of a combinational logic cloud, wherein the switch provides the output of the scan cell to the input of the combinational logic cloud when a simulation enable signal is active, and wherein the switch provides an indeterminate value to the input of the combinational logic cloud when the simulation enable signal is inactive.
An apparatus, comprising:
- a memory storing instructions;
- and
- a processor, coupled with the memory and to execute the instructions, the instructions when executed causing the processor to:
- create an augmented simulation model of an integrated circuit (IC) design by inserting a switch in a simulation model of the IC design between an output of a scan cell and an input of a combinational logic cloud, wherein a simulation enable signal is used to control the switch, wherein the switch provides the output of the scan cell to the input of the combinational logic cloud when the simulation enable signal is active, and wherein the switch provides an indeterminate value to the input of the combinational logic cloud when the simulation enable signal is inactive;
- generate an IC design simulation environment based on the augmented simulation model;
- and
- verify the IC design by using the IC design simulation environment, wherein the simulation enable signal is activated when the combinational logic cloud is desired to be simulated by the IC design simulation environment.
Dependencies are inferred from the claim text.