Methods and apparatus for testing ISFET arrays

A method of dry testing an array of chemically-sensitive transistors having a source, a drain, and a floating gate, the method comprising:

• applying first test voltages to a common source connected group of the chemically-sensitive transistors;
• calculating a resistance based on the first test voltages and currents produced by the first set of test voltages;
• applying second test voltages, wherein the second test voltages drive the chemically-sensitive transistors to transition among a plurality of operational modes and wherein the second test voltages are based partially on the calculated resistance;
• calculating a floating gate voltage of each driven chemically-sensitive transistor;
• and
• determining if each calculated floating gate voltage is within a predetermined threshold.

A method of testing a transistor having a floating gate and an overlap capacitance between the floating gate and at least one of a first and a second terminal, the method comprising:

• applying a first test voltage to the first terminal of the transistor while biasing the second terminal;
• measuring a first output voltage at the second terminal;
• applying a second test voltage to the first terminal of the transistor while keeping the bias of second terminal constant;
• measuring a second output voltage at the second terminal;
• and
• determining a transistor property based on the first and the second output voltages measured at the second terminal.