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US 11,222,684 B2Granted
Refresh control device and memory device for latching an address randomly
AssigneeSK hynix Inc.
InventorsJae Seung Lee, Chang Hyun Kim, Yo Sep Lee
Life of this patent
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Abstract
A refresh control device, and a memory device may be provided. The latch controller may include a first oscillator configured to generate a first oscillation signal, and a second oscillator configured to generate a second oscillation signal. The latch controller may be configured to receive a precharge signal and prevent the second oscillation signal from being synchronized with the precharge signal.
Claims6
A memory device comprising:
- a latch controller configured to output a latch enable signal based on a first source signal synchronized with a precharge signal and a second source signal having a time period different from that of the first source signal;
- a latch enable controller configured to output a latched row address at a predetermined period during an activation section of the latch enable signal;
- a smart refresh latch circuit configured output a smart refresh signal needed to perform a smart refresh operation based on the latched row address;
- and
- a bank in which the smart refresh operation is carried out based on the smart refresh signal.
2 more elements
Dependencies are inferred from the claim text.