US 11,211,948 B2Granted

Distributed CRC-assisted polar code construction

AssigneeTelefonaktiebolaget LM Ericsson (publ)

InventorsDennis Hui, Yufei Blankenship, Michael Breschel

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Abstract

According to some embodiments, a method in a wireless device comprises obtaining a set of information bits for wireless transmission and dividing the set of information bits into one or more subsets of information bits. For each subset, generating extra cyclic redundancy check (CRC) bits using a CRC polynomial capable of generating N CRC bits. The extra CRC bits for each subset comprise less than N CRC bits. The method further comprises: generating a final set of N or less CRC bits for the set of information bits using the CRC polynomial; generating a set of coded bits by encoding the set of information bits for wireless transmission, together with the extra CRC bits and the final set of CRC bits, using a polar encoder; and transmitting the set of coded bits using a wireless transmitter.

Claims9

Dependent claims

A method for use in a wireless transmitter, the method comprising:

obtaining a set of information bits for wireless transmission;
dividing the set of information bits into one or more subsets of information bits by dividing the information bits into nested subsets wherein each successive subset includes the information bits from a previous subset;
for each subset of the one or more subsets of information bits, generating extra cyclic redundancy check (CRC) bits using a CRC polynomial capable of generating N CRC bits and wherein the extra CRC bits for each subset of information bits comprise less than N CRC bits by recursive generation wherein a set of extra CRC bits for a first subset of the one or more subsets of information bits are included a second subset of the one or more subsets of information bits and used as input in a subsequent generation of extra CRC bits for the second subset of information bits;
generating a final set of N or less CRC bits for the set of information bits using the CRC polynomial;
generating a set of coded bits by encoding the set of information bits for wireless transmission, together with the extra CRC bits and the final set of CRC bits, using a polar encoder;
and
transmitting the set of coded bits using a wireless transmitter.

4 more elements

A wireless transmitter comprising processing circuitry operable to:

obtain a set of information bits for wireless transmission;
divide the set of information bits into one or more subsets of information bits by dividing the information bits into nested subsets wherein each successive subset includes the information bits from a previous subset;
for each subset of the one or more subsets of information bits, generate extra cyclic redundancy check (CRC) bits using a CRC polynomial capable of generating N CRC bits and wherein the extra CRC bits for each subset of information bits comprise less than N CRC bits by recursive generation wherein a set of extra CRC bits for a first subset of the one or more subsets of information bits are included a second subset of the one or more subsets of information bits and used as input in a subsequent generation of extra CRC bits for the second subset of information bits;
generate a final set of N or less CRC bits for the set of information bits using the CRC polynomial;
generate a set of coded bits by encoding the set of information bits for wireless transmission, together with the extra CRC bits and the final set of CRC bits, using a polar encoder;
and
transmit the set of coded bits using a wireless transmitter.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application: 16/619,703Filed 6 Jun 2018 · us provisional application
Priority: 6 Jun 2017
Published: US 2020/0186170 A111 Jun 2020
Granted: 28 Dec 2021
Term ends: Not estimatedThe source records don’t support an estimate.

Classification13 codes

H03M 13/09
Using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits: error detection only, e.g.…
H03M 13/2915
Product codes: with an error detection code in one dimension
H03M 13/091
Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit: parallel or block-wise CRC computation
H03M 13/093
Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit: cRC update after modification of the information word