Differential analog input buffer
AssigneeXilinx, Inc.
InventorsRoswald Francis, Christophe Erdmann
Life of this patent
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Abstract
A differential signal input buffer is disclosed. The differential signal input buffer may receive a differential signal that includes a first signal and a second signal and may be divided into a first section and a second section and. The first section may buffer and/or amplify the first signal based on a first level-shifted second signal. The second section may buffer and/or amplify the second signal based on a first level-shifted first signal. In some implementations, the first section may buffer and/or amplify the first signal based on a second level-shifted second signal. Further, in some implementations, the second section may buffer and/or amplify the second signal based on a second level-shifted first signal.
Claims18
A differential signal buffer, comprising:
- a first buffer circuit configured to receive a first level-shifted differential signal, the first buffer circuit comprising:
- a first NMOS transistor;
- a first PMOS transistor, wherein a drain of the first NMOS transistor is coupled to a drain of the first PMOS transistor;
- and
- a first power regulator coupled to a source of the first PMOS transistor and configured to receive a second level-shifted differential signal;
- and
- a second buffer circuit configured to receive the second level-shifted differential signal, the second buffer circuit comprising:
- a second NMOS transistor;
- a second PMOS transistor, wherein a drain of the second NMOS transistor is coupled to a drain of the second PMOS transistor;
- and
- a second power regulator coupled to a source of the second PMOS transistor and configured to receive the first level-shifted differential signal,
- wherein the first buffer circuit is configured to buffer the first level-shifted differential signal based on the second level-shifted differential signal, and the second buffer circuit is configured to buffer the second level-shifted differential signal based on the first level-shifted differential signal.
A method for buffering a differential input signal, the method comprising:
- receiving the differential input signal;
- coupling a source of a first PMOS transistor to a voltage supply and a drain of the first PMOS transistor to a source of a second PMOS transistor;
- receiving a first level-shifted differential signal via a gate of the second PMOS transistor;
- generating a first current, via the first PMOS transistor and the second PMOS transistor, based on the first level-shifted differential signal;
- generating a second current based on a second level-shifted differential signal;
- and
- generating a differential output signal based at least in part on the first current and the second current.
A differential signal buffer, comprising:
- means for receiving a differential input signal;
- means for coupling a source of a first PMOS transistor to a voltage supply and a drain of the first PMOS transistor to a source of a second PMOS transistor;
- means for receiving a first level-shifted differential signal via a gate of the second PMOS transistor;
- means for generating a first current, via the first PMOS transistor and the second PMOS transistor, based on the first level-shifted differential signal;
- means for generating a second current based on a second level-shifted differential signal;
- and
- means for generating a differential output signal based at least in part on the first current and the second current.
Dependencies are inferred from the claim text.