Method of addressing dissimilar etch rates

A method, comprising:

• depositing a continuous first mask layer over a first surface of a silicon substrate;
• exposing a first portion of the continuous first mask layer to a first etch process, wherein the exposing forms a first exposed mask layer representing a critical dimension geometry associated with a fabricated device, wherein the critical dimension geometry represents a first mask layer thickness;
• depositing a second mask layer over the continuous first mask layer and the first exposed mask layer;
• exposing a second portion of the second mask layer to a second etch process, wherein the second portion of the second mask layer overlaps the first portion of the continuous first mask layer, and wherein the exposing of the second portion forms a second exposed mask layer representing dimension geometries of secondary importance to the fabricated device, wherein the dimension geometries of secondary importance represent second mask layer thicknesses;
• exposing a third portion of the second mask layer;
• developing the first exposed mask layer and the second exposed mask layer;
• and
• etching the silicon substrate.