Interconnect structure having a graphene layer
AssigneesSemiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
InventorMing Zhou
Life of this patent
Estimating the term…
Abstract
An interconnect structure includes a substrate, a dielectric layer on the substrate, a metal interconnect layer in the dielectric layer and in contact with the substrate, the metal interconnect layer having an upper surface flush with an upper surface of the dielectric layer, and a graphene layer on the metal interconnect layer. The graphene layer insulates a metal from air and prevents the metal from being oxidized by oxygen in the air, thereby increasing the queue time for the CMP process and the device reliability.
Claims20
An interconnect structure comprising:
- a substrate;
- a first dielectric layer comprising a first silicon carbon nitride (SiCN) layer directly on the substrate, a first silicon dioxide layer directly on the first SiCN layer, and a first hydrogenated silicon-carbide (SiOCH) layer directly on the first silicon dioxide layer;
- a first metal interconnect layer in the first dielectric layer and in contact with the substrate, the first metal interconnect layer having an upper surface flush with an upper surface of the first dielectric layer;
- a first barrier layer disposed between the first dielectric layer and the first metal interconnect layer and between a bottom of the first metal interconnect layer and the substrate, the first barrier layer having an upper surface flush with the upper surface of the first dielectric layer, wherein the first metal interconnect layer and the first barrier layer go through sequentially the first hydrogenated silicon-carbide (SiOCH) layer, the first silicon dioxide layer, and the first SiCN layer;
- a second dielectric layer on the first dielectric layer;
- a second metal interconnect layer in the second dielectric layer and in contact with the first metal interconnect layer;
- a second barrier layer disposed between the first metal interconnect layer and the second metal interconnect layer and comprising a bottom in direct contact with the first metal interconnect layer and the first barrier layer;
- a graphene layer on the second metal interconnect layer and directly contacting an upper surface of the second barrier layer;
- and
- an amorphous carbon layer on the second dielectric layer and having an upper surface flush with an upper surface of the graphene layer, wherein the amorphous carbon layer is not in contact with the second barrier layer, and an interface surface between the graphene layer and the amorphous carbon layer is aligned with an interface surface between the second barrier layer and the second dielectric layer.
An interconnect structure comprising:
- a substrate;
- a dielectric layer comprising a silicon carbon nitride layer (SiCN) directly on the substrate, a silicon dioxide layer directly on the silicon carbon nitride layer, and a hydrogenated silicon-carbide layer (SiOCH) directly on the silicon dioxide layer;
- a metal interconnect layer in the dielectric layer and having an upper surface flush with an upper surface of the dielectric layer;
- a barrier layer disposed between the dielectric layer and the metal interconnect layer and between the metal interconnect layer and the substrate, the barrier layer having an upper surface flush with the upper surface of the dielectric layer, wherein the metal interconnect layer and the barrier layer go through sequentially the hydrogenated silicon-carbide layer(SiOCH), the silicon dioxide layer, and the silicon carbon nitride layer (SiCN);
- a graphene layer on the metal interconnect layer and directly contacting the upper surface of the barrier layer;
- and
- an amorphous carbon layer on the dielectric layer and having an upper surface flush with an upper surface of the graphene layer, wherein the amorphous carbon layer is not in contact with the barrier layer, and an interface surface between the graphene layer and the amorphous carbon layer is aligned with an interface surface between the barrier layer and the dielectric layer.
Dependencies are inferred from the claim text.