Detector circuit and system for galvanically isolated transmission of digital signals

A system, comprising:

• a transmitter side which includes a transmitter encompassing an on-off keying modulator;
• a galvanic isolator joined to the transmitter;
• and
• a receiver side joined to the galvanic isolator and which includes a current comparator, a common-mode control circuit, and a detector circuit connected to the current comparator and the common-mode control circuit, the detector circuit including:
• two differential signal inputs;
• an input common-mode voltage connection;
• an alternating voltage coupling;
• a differential stage;
• an operating voltage connection;
• an operating ground connection;
• a signal output;
• a bias current connection;
• and
• a rectifier stage;
• wherein the alternating voltage coupling includes two capacitors and two resistors, and respective one of the two capacitors being connected to a respective one of the two differential signal inputs, and the two capacitors each being further connected to the differential stage and to the input common-mode voltage connection via the two resistors;
• wherein the differential stage including a first n-channel transistor and a second n-channel transistor, and the first n-channel transistor and the second n-channel transistor each being connected to the respective one of the two resistors of the alternating voltage coupling and the respective one of the two capacitors of the alternating voltage coupling;
• wherein the bias current connection is connected to the differential stage via a third n-channel transistor, and the bias current connection being connected to the rectifier stage via a fourth n-channel transistor and a fifth n-channel transistor;
• wherein the operating ground connection is connected to the third n-channel transistor, the fourth n-channel transistor, and the fifth n-channel transistor;
• wherein the rectifier stage includes five p-channel transistors, the first n-channel transistor being connected to a first one of the five p-channel transistors, a fourth one of the five p-channel transistors and a fifth one of the five p-channel transistors, and the second n-channel transistor being connected to a second one of the five p-channel transistors, the fourth one of the p-channel transistors and the fifth one of the five p-channel transistors;
• wherein the operating voltage connection is connected to the first one of the five p-channel transistors, the second one of the five p-channel transistors, and a third one of the five p-channel transistors;
• and
• wherein the signal output is connected to the fourth one of the five p-channel transistors and the fifth one of the five p-channel transistors.