Back to results
US 11,200,096 B1Granted
Resource allocation for reconfigurable processors
AssigneeSambaNova Systems, Inc.
InventorsRaghunath Shenbagam, Ravinder Kumar
Life of this patent
Estimating the term…
Abstract
A system is described that has a node and runtime logic. The node has a plurality of processing elements operatively coupled by interconnects. The runtime logic is configured to receive target interconnect bandwidth, target interconnect latency, rated interconnect bandwidth and rated interconnect latency. The runtime logic responds by allocating to configuration files defined by the application graph: (1) processing elements in the plurality of processing elements, and (2) interconnects between the processing elements. The runtime logic further responds by executing the configuration files using the allocated processing elements and the allocated interconnects.
Claims26
A data processing system, comprising:
- a pool of reconfigurable dataflow resources, reconfigurable dataflow resources in the pool of reconfigurable dataflow resources including a plurality of reconfigurable processors operatively coupled by links, and the links having rated link bandwidths and rated link latencies;
- and
- runtime logic operatively coupled to the pool of reconfigurable dataflow resources, and configured to:
- receive, for a first application,
- a first plurality of configuration files,
- a first configuration of a first plurality of virtual reconfigurable processors required to execute the first application, and virtual links between virtual reconfigurable processors in the first plurality of virtual reconfigurable processors, wherein the first configuration is encoded in a first virtual routing table that specifies a set of virtual links for each pair of virtual reconfigurable processors in the first plurality of virtual reconfigurable processors, and
- a first specification of target link bandwidths and target link latencies of the virtual links between the virtual reconfigurable processors in the first plurality of virtual reconfigurable processors;
- allocate pairs of reconfigurable processors in the plurality of reconfigurable processors to pairs of virtual reconfigurable processors in the first plurality of virtual reconfigurable processors, and links in the set of links to virtual links in the set of virtual links based on:
- a link bandwidth comparison that compares target link bandwidths of the virtual links in the set of virtual links against rated link bandwidths of the links in the set of links, and
- a link latency comparison that compares target link latencies of the virtual links in the set of virtual links against rated link latencies of the links in the set of links;
- and
- configure the allocated pairs of reconfigurable processors and the allocated links with the configuration data in the first plurality of configuration files, and execute the first application using the configured pairs of reconfigurable processors and the configured links.
9 more elements
A data processing system, comprising:
- a processor coupled to a memory;
- a pool of reconfigurable dataflow resources, reconfigurable dataflow resources in the pool of reconfigurable dataflow resources including a plurality of reconfigurable processors operatively coupled by links, and the links having rated link bandwidths and rated link latencies;
- and
- runtime logic implemented on the processor and operatively coupled to the pool of reconfigurable dataflow resources, the runtime logic configured to:
- receive:
- configuration files for first and second applications,
- a first virtual routing table that specifies a first plurality of virtual reconfigurable processors required to execute the first application, and
- target link bandwidths and target link latencies of virtual links between the virtual reconfigurable processors in the first plurality of virtual reconfigurable processors, wherein the first virtual routing table further specifies a set of virtual links for each pair of virtual reconfigurable processors in the first plurality of virtual reconfigurable processors, and
- a second virtual routing table that specifies a second plurality of virtual reconfigurable processors required to execute the second application, and
- target link bandwidths and target link latencies of virtual links between the virtual reconfigurable processors in the second plurality of virtual reconfigurable processors, wherein the second virtual routing table further specifies a set of virtual links for each pair of virtual reconfigurable processors in the second plurality of virtual reconfigurable processors;
- allocate pairs of reconfigurable processors in the plurality of reconfigurable processors to pairs of virtual reconfigurable processors in the first plurality of virtual reconfigurable processors and pairs of reconfigurable processors in the plurality of reconfigurable processors to pairs of virtual reconfigurable processors in the second plurality of virtual reconfigurable processors, and links between reconfigurable processors in the set of reconfigurable processors to the virtual links between the virtual reconfigurable processors in the first plurality of virtual reconfigurable processors and the virtual links between the virtual reconfigurable processors in the second plurality of virtual reconfigurable processors based on:
- a link bandwidth comparison that compares the rated link bandwidths against the target link bandwidths specified by the first virtual routing table and the target link bandwidths specified by the second virtual routing table, and
- a link latency comparison that compares the rated link latencies against the target link latencies specified by the first virtual routing table and the target link latencies specified by the second virtual routing table;
- and
- configure the allocated pairs of reconfigurable processors and the allocated links with the configuration data in the configuration files, and execute the first and second applications using the configured pairs of reconfigurable processors and the configured links.
12 more elements
A data processing system, comprising:
- a processor coupled to a memory;
- a pool of reconfigurable dataflow resources, reconfigurable dataflow resources in the pool of reconfigurable dataflow resources including a plurality of reconfigurable processors operatively coupled by links, and the links having rated link bandwidths and rated link latencies;
- and
- runtime logic implemented in the processor and operatively coupled to the pool of reconfigurable dataflow resources, the runtime logic configured to:
- receive,
- configuration files that define an application,
- a configuration of a plurality virtual reconfigurable processors and virtual links between the plurality of virtual reconfigurable processors required to execute the application, wherein the configuration is encoded in a virtual routing table that specifies a set of virtual links for each pair of virtual reconfigurable processors in the plurality of virtual reconfigurable processors, and
- a specification of target link bandwidths and target link latencies of the virtual links;
- allocate pairs of reconfigurable processors in the plurality of reconfigurable processors to pairs of virtual reconfigurable processors in the plurality of virtual reconfigurable processors, and links in the set of links to virtual links in the set of virtual links based on:
- a link bandwidth comparison that compares target link bandwidths of the virtual links in the set of virtual links against rated link bandwidths of the links in the set of links, and
- a link latency comparison that compares target link latencies of the virtual links in the set of virtual links against rated link latencies of the links in the set of links;
- and
- configure the allocated pairs of reconfigurable processors and the allocated links with the configuration data in the first plurality of configuration files, and execute the application using the configured pairs of reconfigurable processors and the configured links.
10 more elements
Dependencies are inferred from the claim text.