Low power ECC for eUFS
AssigneeSamsung Electronics Co., Ltd.
InventorsAvner Dor, Amit Berman, Ariel Doubchak
Life of this patent
Estimating the term…
Abstract
Systems and methods are described for low power error correction coding (ECC) for embedded universal flash storage (eUFS) are described. The systems and methods may include identifying a first element of an algebraic field; generating a plurality of lookup tables for multiplying the first element; multiplying the first element by a plurality of additional elements of the algebraic field, wherein the multiplication for each of the additional elements is performed using an element from each of the lookup tables; and encoding information according to an ECC scheme based on the multiplication.
Claims19
A method of processing data, comprising:
- receiving a command to write information in a flash memory device;
- identifying a first element of an algebraic field;
- generating a plurality of lookup tables for multiplying the first element;
- multiplying the first element by a plurality of additional elements of the algebraic field, wherein the multiplication for each of the additional elements is performed using, an element from each of the lookup tables;
- encoding the information according to an error correction code (ECC) based on the multiplication;
- and
- programming the information in the flash memory device based on the encoding in response to the command.
A method of processing data, comprising:
- receiving a command to read information from a flash memory device;
- reading information from the flash memory device;
- identifying a first element of an algebraic field;
- generating a plurality of lookup tables for multiplying the first element;
- splitting a second element of the algebraic field into a plurality of sub-elements, wherein a number of the sub-elements equals a number of the lookup tables;
- identifying a summation term from each of the plurality of lookup tables based on each of the plurality of sub-elements;
- computing a product of the first element and the second element by summing each of the summation terms;
- decoding the information based on the product of the first element and the second element;
- and
- transmitting the information based on the decoding in response to the command.
An apparatus for processing data, comprising:
- a processor;
- a memory;
- a table generation component configured to generate a plurality of lookup tables for multiplying a first element;
- a lookup component configured to split a second element of an algebraic field into a plurality of sub-elements, and identify a summation term from each of the plurality of lookup tables based on each of the plurality of sub-elements;
- a multiplication component configured to compute a product of the first element and the second element by summing each of the summation terms;
- an encoder configured to encode information based on the product of the first element and the second element or a decoder configured to decode the information based on the product of the first element and the second element;
- and
- a programming component configured to program the encoded information to the memory.
Dependencies are inferred from the claim text.