US 11,175,986 B1 · Storage systems implementing offset erasure code stripes

Abstract

A computer-implemented method, according to one embodiment, includes: selecting strips from each storage unit for a given erasure code stripe such that the given erasure code stripe includes at most one strip from a high failure rate region of the respective storage unit, where each of the storage units include high and low failure rate regions. The selected strips are organized such that a number of each strip in the given erasure code stripe is offset from the remaining strips by an amount that is greater than a total number of strips in the high failure rate regions. The organized selected strips are further mapped to form the given erasure code stripe such that the high failure rate regions on each storage unit are mapped to one or more sequentially numbered strips, and the low failure rate regions are mapped to additional sequentially numbered strips.

Claims23

Dependent claims

An erasure code protected storage system, comprising:

a processor;
and
logic integrated with the processor, executable by the processor, or integrated with and executable by the processor, the logic being configured to, for erasure code stripes in storage units:
select, by the processor, strips from each storage unit for a given erasure code stripe such that the given erasure code stripe includes at most one strip from a high failure rate region of the respective storage unit, wherein each of the storage units include high failure rate regions and low failure rate regions;
organize, by the processor, the selected strips such that a number of each strip in the given erasure code stripe is offset from the remaining strips by an amount that is greater than a total number of strips in the high failure rate regions;
and
map, by the processor, the organized selected strips to form the given erasure code stripe,
wherein the high failure rate regions on each storage unit are mapped to one or more sequentially numbered strips,
wherein the low failure rate regions are mapped to additional sequentially numbered strips.

6 more elements

A computer-implemented method for enabling erasure code protection for storage units, comprising, for erasure code stripes in the storage units:

selecting strips from each storage unit for a given erasure code stripe such that the given erasure code stripe includes at most one strip from a high failure rate region of the respective storage unit, wherein each of the storage units include high failure rate regions and low failure rate regions;
organizing the selected strips such that a number of each strip in the given erasure code stripe is offset from the remaining strips by an amount that is greater than a total number of strips in the high failure rate regions;
and
mapping the organized selected strips to form the given erasure code stripe,
wherein the high failure rate regions on each storage unit are mapped to one or more sequentially numbered strips,
wherein the low failure rate regions are mapped to additional sequentially numbered strips.

3 more elements

A computer program product for enabling erasure code protection for storage units, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions readable and/or executable by a processor to cause the processor to, for erasure code stripes in the storage units:

select, by the processor, strips from each storage unit for a given erasure code stripe such that the given erasure code stripe includes at most one strip from a high failure rate region of the respective storage unit, wherein each of the storage units include high failure rate regions and low failure rate regions;
organize, by the processor, the selected strips such that a number of each strip in the given erasure code stripe is offset from the remaining strips by an amount that is greater than a total number of strips in the high failure rate regions;
and
map, by the processor, the organized selected strips to form the given erasure code stripe,
wherein the high failure rate regions on each storage unit are mapped to one or more sequentially numbered strips,
wherein the low failure rate regions are mapped to additional sequentially numbered strips.

3 more elements

Dependencies are inferred from the claim text.

Storage systems implementing offset erasure code stripes

Life of this patent

Storage systems implementing offset erasure code stripes

Life of this patent

Abstract

Claims23