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US 11,171,637 B2Granted
Semiconductor devices
AssigneeSK hynix Inc.
InventorWoongrae Kim
Life of this patent
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Abstract
A semiconductor device includes a test clock generation circuit, a test data generation circuit, and a control code generation circuit. The test clock generation circuit delays a clock signal based on a delay selection signal in a test mode to generate a test clock signal. The test data generation circuit delays data to generate test data. The control code generation circuit latches the test data based on the delay selection signal and the test clock signal to generate a control code.
Claims13
A semiconductor device comprising:
- a test clock generation circuit configured to delay a clock signal based on a delay selection signal in a test mode to generate a test clock signal;
- a test data generation circuit configured to delay data irrespective of delay selection signal to generate test data;
- and
- a control code generation circuit configured to latch the test data based on the delay selection signal and the test clock signal to generate a control code,
- wherein the test clock generation circuit receives a power source voltage to operate, in response to a test enablement signal activated in the test mode.
2 more elements
Dependencies are inferred from the claim text.