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US 11,158,606 B2Granted
Molded direct bonded and interconnected stack
AssigneeInvensas Bonding Technologies, Inc.
InventorsGuilian Gao, Cyprian Emeka Uzoh, Jeremy Alfred Theil, Belgacem Haba, Rajesh Katkar
Life of this patent
Estimating the term…
Abstract
Dies and/or wafers are stacked and bonded in various arrangements including stacks, and may be covered with a molding to facilitate handling, packaging, and the like. In various examples, the molding may cover more or less of a stack, to facilitate connectivity with the devices of the stack, to enhance thermal management, and so forth.
Claims35
A microelectronic assembly, comprising:
- a first substrate having a first bonding surface and a first microelectronic circuit element embedded into the first substrate, a portion of the first circuit element of the first substrate exposed at the first bonding surface of the first substrate;
- a second substrate having a first bonding surface and a first microelectronic circuit element embedded into the second substrate, a portion of the first circuit element of the second substrate exposed at the first bonding surface of the second substrate, the first bonding surface of the second substrate hybrid bonded to the first bonding surface of the first substrate without adhesive so that the first circuit element of the second substrate is electrically coupled to the first circuit element of the first substrate, wherein side edges of the first substrate are misaligned relative to side edges of the second substrate;
- and
- a multi-layer molding covering the side edges of at least the second substrate, wherein the multi-layer molding comprises a first compound layer having a first coefficient of thermal expansion (CTE) at a perimeter surface of the second substrate and a second compound layer with a CTE different than the first CTE covering over the first compound layer.
1 more element
A microelectronic assembly, comprising:
- a plurality of adjacent stacks of multiple microelectronic elements, each stack comprising:
- a first substrate having a first bonding surface and a first microelectronic circuit element embedded into the first substrate, a portion of the first circuit element of the first substrate exposed at the first bonding surface of the first substrate and a first conductive via electrically coupled to the first circuit element of the first substrate and extending at least partially through the first substrate;
- a second substrate having a first bonding surface and a first microelectronic circuit element embedded into the second substrate, a portion of the first circuit element of the second substrate exposed at the first bonding surface of the second substrate and a second conductive via electrically coupled to the first circuit element of the second substrate and extending at least partially through the second substrate, the first bonding surface of the second substrate hybrid bonded to the first bonding surface of the first substrate without adhesive so that the first circuit element of the second substrate is electrically coupled to the first circuit element of the first substrate, wherein side edges of the first substrate are misaligned relative to side edges of the second substrate;
- and
- a molding covering the side edges of at least the second substrate of each stack, including the side edges facing side edges of an adjacent stack.
2 more elements
A microelectronic assembly, comprising:
- a first die having a first bonding surface and a first microelectronic circuit element embedded into the first die, a portion of the first circuit element exposed at the first bonding surface of the first die;
- and
- a second die having a first bonding surface and a first microelectronic circuit element embedded into the second die, a portion of the first circuit element of the second die exposed at the first bonding surface of the second die, the first bonding surface of the first die hybrid bonded to the first bonding surface of the second die, electrically coupling the first die to the second die without an adhesive layer, wherein side edges of the first die comprise a mold layer thinner than a mold layer disposed on side edges of the second die and wherein the mold layer at the first die and/or the mold layer at the second die has a non-uniform density.
A microelectronic assembly, comprising:
- a first die having a first bonding surface and a first microelectronic circuit element embedded into the first die, a portion of the first circuit element exposed at the first bonding surface of the first die;
- a second die having a first bonding surface and a first microelectronic circuit element embedded into the second die, a portion of the first circuit element of the second die exposed at the first bonding surface of the second die, the first bonding surface of the first die hybrid bonded to the first bonding surface of the second die, electrically coupling the first die to the second die without adhesive and forming a stack;
- a molding covering side edges of at least the second die;
- and
- a semiconductor interposer having at least one wirebond contact pad, the stack hybrid bonded to the interposer.
2 more elements
A method of forming a microelectronic assembly, comprising:
- forming a microelectronic stack, comprising:
- providing a first substrate having a front side and a back side, the back side having a bonding surface comprising a nonconductive bonding layer and an exposed electrically conductive first circuit element, the first substrate having a first conductive via electrically coupled to the first circuit element of the first substrate and extending at least partially through the first substrate;
- providing a second substrate having a front side and a back side, the front side including a nonconductive bonding layer and an exposed electrically conductive first circuit element;
- coupling the front side of the second substrate to the back side of the first substrate by contacting the nonconductive bonding layers of the first and second substrates, side edges of the first substrate being misaligned relative to side edges of the second substrate, and contacting the first circuit element of the first substrate to the first circuit element of the second substrate;
- and
- covering the side edges of at least the second substrate with a multi-layer molding, the multi-layer molding including a first compound layer with a first particle content per volume at a perimeter surface of the second substrate and a second compound layer with a particle content per volume greater than the first particle content per volume covering over the first compound layer.
3 more elements
Dependencies are inferred from the claim text.