Secure loading of secret data to non-protected hardware registers

A chip comprising:

• a set of data hardware registers and supporting hardware cryptography operations, and
• a computer program directing the chip to:
• identify available hardware register, unused hardware registers, and other relevant hardware registers not handling sensitive data and not disrupting chip functionality when loaded;
• establish an indexible register list of addresses of the sensitive data hardware registers, and of the hardware registers in the set of available hardware registers;
• and
• in a loop, write each hardware register in this register list with random data, a random number of times, in random order except the last writing in each of the sensitive data hardware registers where a part of the sensitive data is written.

A computer readable device having instruction directing a chip, having a set of data hardware registers and supporting hardware cryptography, to:

• identify available hardware register, unused hardware registers, and other relevant hardware registers not handling sensitive data and not disrupting chip functionality when loaded;
• establish an indexable register list of addresses of the sensitive data hardware registers, and of the hardware registers in the set of available hardware registers;
• and
• in a loop, write each hardware register in this register list with random data, a random number of times, in random order except the last writing in each of the sensitive data hardware registers where a part of the sensitive data is written.