Method and apparatus for video coding
AssigneeTencent America LLC
InventorsMeng Xu, Xiang Li, Shan Liu
Life of this patent
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Abstract
Aspects of the disclosure provide methods and apparatuses for video encoding/decoding. In some examples, an apparatus for video decoding includes receiving circuitry and processing circuitry. The processing circuitry decodes prediction information of a current block in a current picture from a coded video bitstream. The prediction information is indicative of an inter prediction mode. Then, the processing circuitry determines a usage of a first DMVD process on the current block at least partially based on a second DMVD process not being used on the current block. Further, the processing circuitry reconstructs the current block according to the inter prediction mode with the first DMVD process.
Claims20
A method for video decoding in a decoder, comprising:
- decoding prediction information of a current block in a current picture from a coded video bitstream, the prediction information being indicative of an inter prediction mode;
- determining, for each of a plurality of sub-blocks of the current block, a usage of a first (decoder-side motion vector derivation) DMVD process on the respective sub-block of the current block at least partially based on whether a second DMVD process is determined to be used on the respective sub-block of the current block;
- enabling the first DMVD process on a first sub-block of the plurality of sub-blocks of the current block;
- disabling the first DMVD process on a second sub-block of the plurality of sub-blocks of the current block;
- padding the second sub-block of the plurality of sub-blocks that is disabled for the first DMVD process during a gradient calculation using the first sub-block of the plurality of sub-blocks that is enabled for the first DMVD process;
- and
- reconstructing the plurality of sub-blocks of the current block according to the inter prediction mode with the first DMVD process based on the determination for each of the plurality of sub-blocks,
- wherein the second sub-block neighbors the first sub-block.
An apparatus for video decoding, comprising:
- processing circuitry configured to:
- decode prediction information of a current block in a current picture from a coded video bitstream, the prediction information being indicative of an inter prediction mode;
- determine, for each of a plurality of sub-blocks of the current block, a usage of a first (decoder-side motion vector derivation) DMVD process on the respective sub-block of the current block at least partially based on whether a second DMVD process is determined to be used on the respective sub-block of the current block;
- enable the first DMVD process on a first sub-block of the plurality of sub-blocks of the current block;
- disable the first DMVD process on a second sub-block of the plurality of sub-blocks of the current block;
- pad the second sub-block of the plurality of sub-blocks that is disabled for the first DMVD process during a gradient calculation using the first sub-block of the plurality of sub-blocks that is enabled for the first DMVD process;
- and
- reconstruct the plurality of sub-blocks of the current block according to the inter prediction mode with the first DMVD process based on the determination for each of the plurality of sub-blocks,
- wherein the second sub-block neighbors the first sub-block.
Dependencies are inferred from the claim text.