US 11,153,064 B2 · Clock and data recovery device and training method thereof

Abstract

A clock and data recovery (CDR) device includes a data sampler configured to output a data signal by sampling an input signal according to a first clock signal; an edge sampler configured to output an edge signal by sampling the input signal according to a second clock signal, the second clock signal having substantially the same frequency as the first clock signal and having substantially an opposite phase to the first clock signal; an error detection circuit configured to identify a plurality of patterns based on the data signal and the edged signal and generate an error signal according to occurrence frequencies of the identified plurality of patterns; and an oscillation control circuit configured to generate a first oscillation control signal to control an oscillator generating the first and second clock signal according to the error signal.

Claims18

Dependent claims

A clock and data recovery (CDR) device comprising:

a data sampler configured to output a data signal by sampling an input signal according to a first clock signal;
an edge sampler configured to output an edge signal by sampling the input signal according to a second clock signal, the second clock signal having substantially the same frequency as the first clock signal and having substantially an opposite phase to the first clock signal;
an error detection circuit configured to identify a plurality of patterns based on the data signal and the edge signal and generate an error signal according to occurrence frequencies of the identified plurality of patterns;
and
an oscillation control circuit configured to generate a first oscillation control signal to control an oscillator generating the first and second clock signals according to the error signal.

2 more elements

A training method of a clock and data recovery (CDR) device, wherein the CDR device samples an input signal according to a first clock signal to generate a data signal, samples the input signal according to a second clock signal to generate an edge signal, identifies a plurality of patterns based on the data signal and the edge signal, and generates an error signal by calculating a plurality of weights and occurrence frequencies of the plurality of patterns, the training method comprising:

generating a plurality of histograms according to a phase difference between the input signal and a clock signal, or a frequency difference between the input signal and the clock signal, or both, the clock signal being the first clock signal or the second clock signal;
calculating the plurality of weights based on a representative histogram selected from the plurality of histograms;
generating a phase difference graph and a frequency difference graph by applying the plurality of weights to the plurality of histograms;
and
determining whether the phase difference graph and the frequency difference graph satisfy a predetermined condition.

2 more elements

Dependencies are inferred from the claim text.

Clock and data recovery device and training method thereof

Life of this patent

Clock and data recovery device and training method thereof

Life of this patent

Abstract

Claims18