US 11,152,966 B1Granted

Digital active interference cancellation for full duplex transmit-receive (TX-RX) concurrency

AssigneeAmazon Technologies, Inc.

InventorsBasak Oyman, Sai Prashanth Chinnapalli, Morris Yuanhsiang Hsu

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Abstract

Technologies directed to digital active interference cancellation (d-AIC) for full duplex transmit-receive (TX-RX) concurrency. An integrated circuit can include first and second analog front-ends (AFE) and digital front-end (DFE) circuits and a digital AIC circuit that generates a scaled and delayed replica of a first quadrature (IQ) sample corresponding to first data transmitted by the first AFE circuit which is being coupled into the receiver as aggressor. The digital AIC circuit receives a second IQ sample from the second AFE circuit, the second IQ sample corresponding to second data being received by the second AFE circuit. The digital AIC circuit subtracts the scaled and delayed replica of the first IQ sample from the second IQ sample to obtain a third IQ sample and sends the third IQ sample to the second DFE circuit. Third IQ sample is the desired signal when d-AIC cancels the self-interference.

Claims20

Dependent claims

An electronic device comprising:

a first antenna;
a second antenna;
and
an integrated circuit comprising:
a first analog front-end (AFE) circuit of a first radio, the first AFE circuit being coupled to the first antenna;
a second AFE circuit of a second radio, the second AFE circuit being coupled to the second antenna;
a first digital front-end (DFE) circuit of the first radio;
a second DFE circuit of the second radio;
and
a digital active interference cancellation (AIC) circuit coupled to the first AFE circuit, the second AFE circuit, the first DFE circuit, and the second DFE circuit, wherein the digital AIC circuit:
receives a first quadrature (IQ) sample from the first DFE circuit, the first IQ sample being representative of first data being transmitted by the first AFE circuit;
receives a second IQ sample from the second AFE circuit, the second IQ sample being representative of second data being received by the second AFE circuit concurrently with the first data being transmitted by the first AFE circuit;
generates a third IQ sample by scaling and delaying the first IQ samples;
subtracts the third IQ sample from the second IQ sample that result in a fourth IQ sample, the fourth IQ sample being representative of the second data being received with interference from the first IQ sample being canceled by the digital AIC circuit;
and
sends the fourth IQ sample to the second DFE circuit.

13 more elements

An integrated circuit comprising:

a first analog front-end (AFE) circuit;
a second AFE circuit;
a first digital front-end (DFE) circuit;
a second DFE circuit;
and
a digital active interference cancellation (AIC) circuit coupled to the first AFE circuit and the second DFE circuit, wherein the digital AIC is to:
generate a scaled and delayed replica of a first quadrature (IQ) sample corresponding to first data transmitted by the first AFE circuit;
receive a second IQ sample from the second AFE circuit, the second IQ sample corresponding to second data being received by the second AFE circuit;
subtract the scaled and delayed replica of the first IQ sample from the second IQ sample to obtain a third IQ sample;
and
send the third IQ sample to the second DFE circuit.

8 more elements

A method comprising:

receiving, by a digital active interference cancellation (AIC) circuit, a first quadrature (IQ) sample corresponding to first data transmitted by a first analog front-end (AFE) circuit of a transmitter;
generating, by the digital AIC circuit, a scaled and delayed replica of the first IQ sample;
receiving, by the digital AIC circuit, a second IQ sample from a second AFE circuit of a receiver, the second IQ sample corresponding to second data being received by the second AFE circuit;
subtracting, by the digital AIC circuit, the scaled and delayed replica of the first IQ sample from the second IQ sample to obtain a third IQ sample;
and
sending, by the digital AIC circuit, the third IQ sample to a second digital front-end (DFE) circuit of the receiver.

3 more elements

Dependencies are inferred from the claim text.