US 11,152,951 B2 · Quad switched multibit digital to analog converter and continuous time sigma-delta modulator

Abstract

A quad signal generator circuit generates four 2N−1 bit control signals in response to a sampling clock and a 2N−1 bit thermometer coded signal. A digital-to-analog converter (DAC) circuit has 2N−1 unit resistor elements, with each unit resistor element including four switching circuits controlled by corresponding bits of the four 2N−1 bit control signals. Outputs of the 2N−1 unit resistor elements are summed to generate an analog output signal. The quad signal generator circuit controls generation of the four 2N−1 bit control signals such that all logic states of bits of the four 2N−1 bit control signals remain constant for at least a duration of one cycle of the sampling clock. The analog output signal may be a feedback signal in a sigma-delta analog-to-digital converter (ADC) circuit that includes a multi-bit quantization circuit operating to quantize a filtered loop signal to generate the 2N−1 bit thermometer coded signal.

Claims29

Dependent claims

A circuit, comprising:

a digital-to-analog converter (DAC) circuit having 2N−1 unit resistive DAC elements, wherein each unit resistive DAC element includes four switching circuits controlled by corresponding bits of four 2N−1 bit control signals, wherein outputs of the 2N−1 unit resistive DAC elements are summed to generate an analog output signal;
and
a quad signal generator circuit configured to generate the four 2N−1 bit control signals in response to a sampling clock and a 2N−1 bit thermometer coded input signal, wherein the quad signal generator circuit controls generation of the four 2N−1 bit control signals such that all logic states of bits of the four 2N−1 bit control signals remain constant for at least a duration of one cycle of the sampling clock.

A sigma-delta analog-to-digital converter (ADC) circuit, comprising:

a loop filter configured to receive an analog input signal and a first analog feedback signal and generate an integrated signal;
a multi-bit quantization circuit configured to quantize the integrated signal and generate a 2N−1 bit thermometer coded signal;
a quad signal generator circuit configured to generate four 2N−1 bit control signals in response to a sampling clock and the 2N−1 bit thermometer coded signal;
a first digital-to-analog converter (DAC) circuit having 2N−1 unit resistive DAC elements, wherein each unit resistive DAC element includes four switching circuits controlled by corresponding bits of the four 2N−1 bit control signals;
wherein outputs of the 2N−1 unit resistive DAC elements of the first DAC circuit are summed to generate the first analog feedback signal;
and
wherein the quad signal generator circuit controls generation of the four 2N−1 bit control signals such that all logic states of bits of the four 2N−1 bit control signals remain constant for at least a duration of one cycle of the sampling clock.

4 more elements

Dependencies are inferred from the claim text.

Quad switched multibit digital to analog converter and continuous time sigma-delta modulator

Life of this patent

Quad switched multibit digital to analog converter and continuous time sigma-delta modulator

Life of this patent

Abstract

Claims29