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US 11,152,939 B2Granted
Semiconductor apparatus performing calibration operation and a semiconductor system using the same
AssigneeSK hynix Inc.
InventorJi Hyo Kang
Life of this patent
Estimating the term…
Abstract
A semiconductor apparatus includes a calibration circuit and a main driver. The calibration circuit is configured to generate a first calibration code when set to have a positive offset and generate a second calibration code when set to have a negative offset complementary to the positive offset. The main driver is configured to set a resistance value of the main driver based on the first and second calibration codes.
Claims18
A semiconductor apparatus comprising:
- a calibration circuit including a comparator configured to compare a calibration voltage and a reference voltage to generate a comparison signal, and configured to generate a first calibration code based on the comparison signal when the comparator is set to have a positive offset and generate a second calibration code based on the comparison signal when the comparator is set to have a negative offset complementary to the positive offset;
- and
- a main driver including a plurality of drivers coupled in parallel, configured to set a resistance value of the plurality of drivers based on the first calibration code and the second calibration code.
A semiconductor apparatus comprising:
- a calibration circuit including a comparator configured to compare a calibration voltage and a reference voltage to generate a comparison signal, and configured to generate a first calibration code based on the comparison signal when the comparator is set to have a positive offset, generate a second calibration code based on the comparison signal when the comparator is set to have a negative offset complementary to the positive offset, and generate a shifted calibration code by changing a value of the second calibration code based on a shifting control signal;
- and
- a main driver configured to set a resistance value of the main driver based on the first calibration code and the shifted calibration code.
A semiconductor apparatus comprising:
- a calibration circuit including a comparator configured to compare a calibration voltage and a reference voltage to generate a comparison signal, wherein the calibration circuit is configured to generate a first calibration code based on the comparison signal when the comparator is set to have a positive offset, generate a second calibration code based on the comparison signal when the comparator is set to have a negative offset complementary to the positive offset, generate a shifted calibration code by changing a value of the second calibration code based on a shifting control signal, and generate an average calibration code having a code value corresponding to an average of code values of the first calibration code and the shifted calibration code;
- and
- a main driver configured to set a resistance value of the main driver based on the average calibration code.
A semiconductor apparatus comprising:
- a calibration circuit including a comparator configured to compare a calibration voltage and a reference voltage to generate a comparison signal, and configured to generate a first pull-up calibration code based on the comparison signal when the comparator is set to have a positive offset and generate a second pull-up calibration code based on the comparison signal when the comparator is set to have a negative offset complementary to the positive offset;
- and
- a main driver configured to set a pull-up resistance value of the main driver based on the first pull-up calibration code and the second pull-up calibration code.
A semiconductor apparatus comprising:
- a calibration circuit including a comparator configured to compare a calibration voltage and a reference voltage to generate a comparison signal, and configured to generate a first pull-down calibration code based on the comparison signal when the comparator is set to have a positive offset and generate a second pull-down calibration code based on the comparison signal when the comparator is set to have a negative offset complementary to the positive offset;
- and
- a main driver configured to set a pull-down resistance value of the main driver based on the first pull-down calibration code and the second pull-down calibration code.
A semiconductor apparatus comprising:
- a calibration circuit including a first comparator configured to compare a first calibration voltage and a first reference voltage to generate a first comparison signal and a second comparator configured to compare a second calibration voltage and a second reference voltage to generate a second comparison signal, configured to generate a first pull-up calibration code based on the first comparison signal when the first comparator is set to have a positive offset and generate a second pull-up calibration code based on the first comparison signal when the first comparator is set to have a negative offset complementary to the positive offset, and configured to generate a first pull-down calibration code based on the first comparison signal when the second comparator is set to have a positive offset and generate a second pull-down calibration code based on the second comparison signal when the second comparator is set to have a negative offset complementary to the positive offset;
- and
- a main driver configured to set a pull-up resistance value of the main driver based on the first pull-up calibration code and the second pull-up calibration code and configured to set a pull-down resistance value of the main driver based on the first pull-down calibration code and the second pull-down calibration code.
Dependencies are inferred from the claim text.