Semiconductor device

A semiconductor device comprising:

• a first scan input circuit configured to receive a scan input signal, a first data signal, and a scan enable signal and select any one of the first data signal and the scan input signal in response to the scan enable signal to output a first select signal;
• a first master latch configured to latch the first select signal to output a first output signal;
• a first slave latch configured to latch the first output signal to output a second output signal, wherein the first slave latch includes a first inverter, and the first inverter inverts the second output signal to output a third output signal;
• a second scan input circuit configured to receive the third output signal, a second data signal, and the scan enable signal and select any one of the second data signal and the third output signal in response to the scan enable signal to output a second select signal;
• a second master latch configured to latch the second select signal to output a fourth output signal;
• a second slave latch configured to latch the fourth select signal to output a fifth output signal;
• and
• a scan output circuit configured to receive a signal output from the second slave latch and an external signal to output a first scan output signal.