Multiple dithering profile signal generation
AssigneeTexas Instruments Incorporated
InventorsSang Yong Lee, Paul David Curtis
Life of this patent
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Abstract
At least some aspects of the present disclosure provide for a system. In some examples, the system includes a pulse width modulation (PWM) generator configured to generate a PWM signal. The PWM generator generates the PWM signal by generating a first signal having a first dithering profile and a first frequency bandwidth, generating a second signal having a second dithering profile and a second frequency bandwidth greater than the first frequency bandwidth, modulating the second signal with the first signal to generate a dual random spread spectrum signal, and generating the pulse width modulation signal according to the dual random spread spectrum signal.
Claims24
A circuit, comprising:
- a linear feedback shift register (LFSR) comprising:
- a clock input terminal configured to receive a clock signal,
- a first output terminal, and
- a second output terminal;
- a clock divider comprising:
- a clock input terminal configured to receive the clock signal,
- a first input terminal coupled to the first output terminal of the LFSR,
- a second input terminal coupled to the second output terminal of the LFSR, and
- an output terminal;
- a ramp generator comprising:
- an input terminal coupled to the output terminal of the clock divider, and
- an output terminal;
- an adder comprising:
- a first input terminal coupled to the output terminal of the ramp generator,
- a second input terminal coupled to the first output terminal of the LFSR, and
- an output terminal;
- and
- an oscillator comprising:
- a first input terminal coupled to the output terminal of the adder, and
- an output terminal.
A circuit, comprising:
- a linear feedback shift register (LFSR) clocked by a clock signal, the LFSR configured to output a pseudorandom value in a digital data format;
- a clock divider configured to receive the clock signal and divide the clock signal by the pseudorandom value to generate and output a divided clock signal;
- a ramp generator configured to receive the divided clock signal, generate a ramp signal according to the divided clock signal, and output the ramp signal in the digital data format;
- an adder configured to modulate the ramp signal with the pseudorandom value to generate a dual random spread spectrum signal;
- and
- an oscillator configured to receive the dual random spread spectrum signal and generate a pulse width modulation signal according to the dual random spread spectrum signal.
A system, comprising:
- a pulse width modulation generator configured to generate a pulse width modulation signal by:
- generating a first signal having a first dithering profile and a first frequency bandwidth;
- generating a second signal having a second dithering profile and a second frequency bandwidth greater than the first frequency bandwidth;
- modulating the second signal with the first signal to generate a dual random spread spectrum signal;
- and
- generating the pulse width modulation signal according to the dual random spread spectrum signal.
Dependencies are inferred from the claim text.