Amplitude and phase detection circuit

An impedance matching network comprising:

• a radio frequency (RF) input configured to operably couple to an RF source and to receive an RF signal from the RF source;
• an RF output configured to operably couple to a plasma chamber;
• at least one electronically variable capacitor (EVC);
• and
• a phase detection circuit comprising:
• a current signal input configured to receive a current signal indicative of a current amplitude of the RF signal;
• a voltage signal input configured to receive a voltage signal indicative of a voltage amplitude of the RF signal;
• a high-pass filter and a low-pass filter each configured to filter one of (i) the current signal from the current signal input or (ii) the voltage signal from the voltage signal input, wherein the high-pass filter and the low-pass filter collectively cause a substantially 90 degree offset between a phase angle of the current signal and a phase angle of the voltage signal;
• and
• a phase difference circuit configured to receive the filtered current signal and the filtered voltage signal to determine a phase angle difference between the current signal and the voltage signal.

A semiconductor processing tool comprising:

• a plasma chamber configured to deposit a material onto a substrate or etch a material from the substrate;
• and
• an impedance matching network operably coupled to the plasma chamber, the matching network comprising:
• a radio frequency (RF) input configured to operably couple to an RF source and to receive an RF signal from the RF source;
• an RF output configured to operably couple to a plasma chamber;
• at least one electronically variable capacitor (EVC);
• and
• a phase detection circuit comprising:
• a current signal input configured to receive a current signal indicative of a current amplitude of the RF signal;
• a voltage signal input configured to receive a voltage signal indicative of a voltage amplitude of the RF signal;
• a high-pass filter and a low-pass filter each configured to filter one of (i) the current signal from the current signal input or (ii) the voltage signal from the voltage signal input, wherein the high-pass filter and the low-pass filter collectively cause a substantially 90 degree offset between a phase angle of the current signal and a phase angle of the voltage signal;
• and
• a phase difference circuit configured to receive the filtered current signal and the filtered voltage signal to determine a phase angle difference between the current signal and the voltage signal.

A method of matching an impedance comprising:

• coupling an RF input of a matching network to an RF source to receive an RF signal from the RF source;
• coupling an RF output of the matching network to a plasma chamber, wherein the matching network comprises:
• at least one electronically variable capacitor (EVC);
• and
• a phase detection circuit comprising:
• a current signal input configured to receive a current signal indicative of a current amplitude of the RF signal;
• a voltage signal input configured to receive a voltage signal indicative of a voltage amplitude of the RF signal;
• a high-pass filter and a low-pass filter each configured to filter one of (i) the current signal from the current signal input or (ii) the voltage signal from the voltage signal input, wherein the high-pass filter and the low-pass filter collectively cause a substantially 90 degree offset between a phase angle of the current signal and a phase angle of the voltage signal;
• and
• a phase difference circuit configured to receive the filtered current signal and the filtered voltage signal to determine a phase angle difference between the current signal and the voltage signal;
• determining the phase angle difference using the phase detection circuit;
• determining an input impedance based on the determined phase angle difference;
• and
• altering the impedance of the EVC based on the determined input impedance.

A method of fabricating a semiconductor comprising:

• placing a substrate in a plasma chamber configured to deposit a material layer on the substrate or etch a material layer from the substrate;
• energizing plasma within the plasma chamber by coupling RF power from an RF source to the plasma chamber to perform the deposition or etching;
• and
• while energizing the plasma, carrying out an impedance match by an impedance matching network coupled between the plasma chamber and the RF source, the matching network comprising:
• a radio frequency (RF) input configured to operably couple to the RF source and to receive an RF signal from the RF source;
• an RF output configured to operably couple to a plasma chamber;
• at least one electronically variable capacitor (EVC);
• and
• a phase detection circuit comprising:
• a current signal input configured to receive a current signal indicative of a current amplitude of the RF signal;
• a voltage signal input configured to receive a voltage signal indicative of a voltage amplitude of the RF signal;
• a high-pass filter and a low-pass filter each configured to filter one of (i) the current signal from the current signal input or (ii) the voltage signal from the voltage signal input, wherein the high-pass filter and the low-pass filter collectively cause a substantially 90 degree offset between a phase angle of the current signal and a phase angle of the voltage signal;
• and
• a phase difference circuit configured to receive the filtered current signal and the filtered voltage signal to determine a phase angle difference between the current signal and the voltage signal.