Analog switch circuit, volume circuit, and semiconductor integrated circuit

An analog switch circuit that allows switching between interruption and conduction according to a control signal, the analog switch circuit comprising:

• a main input terminal that receives an input voltage;
• an output terminal;
• an upper-side power supply terminal that receives an upper supply voltage;
• a lower-side power supply terminal that receives a lower supply voltage;
• a main N-channel MOS transistor and a main P-channel MOS transistor that are disposed in parallel between the main input terminal and the output terminal, MOS standing for metal oxide semiconductor;
• a first driver that applies one according to the control signal in a high-side voltage and a low-side voltage to a gate of the main N-channel MOS transistor;
• a second driver that applies the other according to the control signal in the high-side voltage and the low-side voltage to a gate of the main P-channel MOS transistor;
• a first resistor disposed between the upper-side power supply terminal and a first output node at which the high-side voltage is generated;
• a second resistor and a third resistor disposed in series between the upper-side power supply terminal and the main input terminal;
• a first transistor of a negative-positive-negative type in which a base is connected to a first internal node that connects the second resistor and the third resistor and a collector is connected to the first output node;
• a fourth resistor disposed between an emitter of the first transistor and the main input terminal;
• a fifth resistor disposed between the lower-side power supply terminal and a second output node at which the low-side voltage is generated;
• a sixth resistor and a seventh resistor disposed in series between the lower-side power supply terminal and the main input terminal;
• a second transistor of a positive-negative-positive type in which a base is connected to a second internal node that connects the sixth resistor and the seventh resistor and a collector is connected to the second output node;
• and
• an eighth resistor disposed between an emitter of the second transistor and the main input terminal.

A volume circuit comprising:

• a resistance voltage dividing circuit that includes a plurality of resistive elements connected in series and has one end to which an input signal is applied;
• a plurality of analog switch circuits disposed corresponding to a plurality of taps of the resistance voltage dividing circuit;
• and
• a volume controller that controls the plurality of the analog switch circuits, wherein
• at least one of the plurality of the analog switch circuits is
• an analog switch circuit that allows switching between an on-state and an off-state according to a control signal, the analog switch circuit including
• a main input terminal that receives an input voltage,
• an output terminal,
• an upper-side power supply terminal that receives an upper supply voltage,
• a lower-side power supply terminal that receives a lower supply voltage,
• a main N-channel MOS transistor and a main P-channel MOS transistor that are disposed in parallel between the main input terminal and the output terminal, MOS standing for metal oxide semiconductor, and
• a controller that includes a voltage generating circuit that generates a high-side voltage according to the upper supply voltage and the input voltage and a low-side voltage according to the input voltage and the lower supply voltage, the controller being capable of controlling a gate and a back gate of each of the main N-channel MOS transistor and the main P-channel MOS transistor based on the high-side voltage and the low-side voltage.

A volume circuit comprising:

• a resistance voltage dividing circuit that includes a plurality of resistive elements connected in series and has one end to which an input signal is applied;
• and
• an analog switch circuit that receives voltages of a plurality of taps of the resistance voltage dividing circuit, the analog switch circuit allowing switching between an on-state and an off-state according to a control signal, the analog switch circuit including
• a main input terminal that receives an input voltage,
• an output terminal,
• an upper-side power supply terminal that receives an upper supply voltage,
• a lower-side power supply terminal that receives a lower supply voltage,
• a main N-channel MOS transistor and a main P-channel MOS transistor that are disposed in parallel between the main input terminal and the output terminal, MOS standing for metal oxide semiconductor, and
• a controller that includes a voltage generating circuit that generates a high-side voltage according to the upper supply voltage and the input voltage and a low-side voltage according to the input voltage and the lower supply voltage, the controller being capable of controlling a gate and a back gate of each of the main N-channel MOS transistor and the main P-channel MOS transistor based on the high-side voltage and the low-side voltage,
• at least one sub-main input terminal that each receives a voltage arising from voltage dividing of the input voltage,
• at least one sub-N-channel MOS transistor each disposed between corresponding one of the at least one sub-main input terminal and the output terminal, and
• at least one sub-P-channel MOS transistor each disposed between corresponding one of the at least one sub-main input terminal and the output terminal, wherein
• the low-side voltage is applied to a back gate of the at least one sub-N-channel MOS transistor and the high-side voltage is applied to a back gate of the at least one sub-P-channel MOS transistor.

A semiconductor integrated circuit comprising:

• a volume circuit including
• a resistance voltage dividing circuit that includes a plurality of resistive elements connected in series and has one end to which an input signal is applied,
• a plurality of analog switch circuits disposed corresponding to a plurality of taps of the resistance voltage dividing circuit, and
• a volume controller that controls the plurality of the analog switch circuits, wherein
• at least one of the plurality of the analog switch circuits is
• an analog switch circuit that allows switching between an on-state and an off-state according to a control signal, the analog switch circuit including
• a main input terminal that receives an input voltage,
• an output terminal,
• an upper-side power supply terminal that receives an upper supply voltage,
• a lower-side power supply terminal that receives a lower supply voltage,
• a main N-channel MOS transistor and a main P-channel MOS transistor that are disposed in parallel between the main input terminal and the output terminal, MOS standing for metal oxide semiconductor, and
• a controller that includes a voltage generating circuit that generates a high-side voltage according to the upper supply voltage and the input voltage and a low-side voltage according to the input voltage and the lower supply voltage, the controller being capable of controlling a gate and a back gate of each of the main N-channel MOS transistor and the main P-channel MOS transistor based on the high-side voltage and the low-side voltage.