Structure having improved fin critical dimension control
AssigneesTaiwan Semiconductor Manufacturing Company, Ltd., Tsmc Nanjing Company, Limited
InventorsKuan Jung Chen, I-Chih Chen, Chih-Mu Huang, Ching-Pin Lin, Sheng-Lin Hsieh
Life of this patent
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Abstract
A semiconductor structure includes an active semiconductor fin having a first height, a dummy semiconductor fin adjacent to the active semiconductor fin and having a second height less than the first height, an isolation structure between the active semiconductor fin and the dummy semiconductor fin, and a dielectric cap over the dummy semiconductor fin. The dielectric cap is separated from the active semiconductor fin.
Claims20
A semiconductor structure, comprising:
- an active semiconductor fin having a first height;
- a dummy semiconductor fin adjacent to the active semiconductor fin, the dummy semiconductor fin having a second height less than the first height;
- an isolation structure between the active semiconductor fin and the dummy semiconductor fin;
- a dielectric cap over the dummy semiconductor fin, wherein the dielectric cap is separated from the active semiconductor fin;
- and
- a gate structure over the active semiconductor fin, wherein the gate structure is separated from the dummy semiconductor fin.
A semiconductor structure, comprising,
- a substrate;
- a plurality of active semiconductor fins, wherein each active semiconductor fin of the plurality of active semiconductor fins has a first height;
- a plurality of dummy semiconductor fins, wherein each dummy semiconductor fin of the plurality dummy semiconductor fins has a second height less than the first height, and top surfaces of the plurality of dummy semiconductor fins form a concave profile;
- a plurality of isolation structures on the substrate, wherein each isolation structure of the plurality of isolation structures separates corresponding active semiconductor fins of the plurality of active semiconductor fins or corresponding dummy semiconductor fins of the plurality of dummy semiconductor fins from one another;
- and
- a dielectric cap over the plurality of dummy semiconductor fins, wherein the dielectric cap is spaced from the plurality of active semiconductor fins.
A semiconductor structure, comprising:
- a first semiconductor fin having a first height;
- a second semiconductor fin having the first height;
- a third semiconductor fin having a second height less than the first height, wherein the third semiconductor fin is between the first semiconductor fin and the second semiconductor fin;
- a first isolation structure between the first semiconductor fin and the third semiconductor fin;
- a second isolation structure between the second semiconductor fin and the third semiconductor fin;
- a dielectric layer over a top-most surface of the third semiconductor fin, wherein the dielectric layer is separated from the first semiconductor fin;
- a first gate structure over the first semiconductor fin;
- and
- a second gate structure over the second semiconductor fin, wherein the first gate structure is discontinuous with the second gate structure.
Dependencies are inferred from the claim text.