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US 11,145,757 B2Granted
Integrated circuit devices including a vertical field-effect transistor (VFET) and methods of forming the same
AssigneeSamsung Electronics Co., Ltd.
InventorsYoung Chai Jung, Seon Bae Kim, Seung Hyun Song
Life of this patent
Estimating the term…
Abstract
Integrated circuit devices and methods of forming the same are provided. Integrated circuit devices may include a vertical field-effect transistor (VFET) that includes a bottom source/drain region in a substrate, a channel region on the bottom source/drain region, a top source/drain region on the channel region, and a gate structure on a side of the channel region. The channel region may have a cross-shaped upper surface.
Claims20
An integrated circuit device comprising:
- a vertical field-effect transistor (VFET) comprising:
- a bottom source/drain region in a substrate;
- a channel region on the bottom source/drain region, wherein the channel region comprises a cross-shaped upper surface;
- a top source/drain region on the channel region;
- a gate structure on a side of the channel region;
- a first spacer vertically interposed between the bottom source/drain region and the gate structure;
- and
- a second spacer vertically interposed between the gate structure and the top source/drain region.
5 more elements
An integrated circuit device comprising:
- a vertical field-effect transistor (VFET) comprising:
- a bottom source/drain region in a substrate;
- a channel region on the substrate, wherein the channel region comprises a core portion, a first pair of protruding portions, and a second pair of protruding portions, wherein the first pair of protruding portions protrude toward respective opposite directions from the core portion along a first horizontal direction, and the second pair of protruding portions protrude toward respective opposite directions from the core portion along a second horizontal direction, and wherein the first horizontal direction and the second horizontal direction are parallel to an upper surface of the substrate and are different from each other;
- a top source/drain region on the channel region, wherein the channel region is between the bottom source/drain region and the top source/drain region;
- a gate structure on a side of the channel region;
- a first spacer vertically interposed between the bottom source/drain region and the gate structure;
- and
- a second spacer vertically interposed between the gate structure and the top source/drain region.
5 more elements
An integrated circuit device comprising:
- a vertical field-effect transistor (VFET) comprising:
- a bottom source/drain region in a substrate;
- a channel region on the bottom source/drain region;
- a top source/drain region on the channel region, wherein the top source/drain region comprises a cross-shaped upper surface, and the channel region is between the bottom source/drain region and the top source/drain region;
- a gate structure on a side of the channel region;
- a first spacer vertically interposed between the bottom source/drain region and the gate structure;
- and
- a second spacer vertically interposed between the gate structure and the top source/drain region.
5 more elements
Dependencies are inferred from the claim text.