Method for manufacturing semiconductor device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJack Liu, Jiann-Tyng Tzeng, Chih-Liang Chen, Chew-Yuen Young, Sing-Kai Huang, Ching-Fang Huang
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Abstract
A method for manufacturing a semiconductor device includes following operations. A substrate including an active area is received. A plurality of source/drain regions of a plurality of transistor devices are formed in the active area. An isolation region is inserted between two adjacent source/drain regions of two adjacent transistor devices. The isolation region and the two adjacent source/drain regions cooperatively form two diode devices electrically connected in a back to back manner.
Claims20
A method for manufacturing a semiconductor device, comprising:
- receiving a substrate including an active area having a first doping concentration of a first doping type;
- forming a plurality of source/drain regions of a plurality of transistor devices in the active area;
- inserting an isolation region in the active area between two adjacent source/drain regions of two adjacent transistor devices, wherein the isolation region has a second doping concentration of the first doping type and higher than the first doping concentration, and the isolation region and the two adjacent source/drain regions cooperatively form two diode devices electrically connected in a back to back manner;
- and
- performing a thermal operation to drive in dopants of the isolation region having the second doping concentration into the active area of the first doping type to form a pair of second isolation regions having a third doping concentration of the first doping type on opposite sides of the isolation region having the first doping concentration.
A method for manufacturing a semiconductor device, comprising:
- receiving a substrate comprising an active area;
- performing an ion implantation to form a first isolation region in the active area;
- forming a pair of transistor devices over the substrate, wherein each of the pair of the transistor devices comprises a channel, a gate electrode over the channel, and a source/drain region alongside the gate electrode;
- and
- forming a pair of second isolation regions on two opposing sides of the first isolation region,
- wherein the first isolation region and the pair of second isolation regions have a first doping type, and a doping concentration of the pair of second isolation regions is lower than that of the first isolation region, and
- wherein the forming of the pair of transistor devices further comprises:
- forming a first sacrificial gate line over the first isolation region and a pair of second sacrificial gate lines over the active area;
- forming a side spacer alongside the first sacrificial gate line and each of the pair of second sacrificial gate lines;
- and
- forming a plurality of source/drain regions over the substrate alongside each of the pair of second sacrificial gate lines.
A method for manufacturing a semiconductor device, comprising:
- receiving a substrate comprising an active area;
- forming a first isolation region in the active area;
- forming a pair of transistor devices over the substrate, wherein each of the pair of the transistor devices comprises a channel, a gate electrode over the channel, and a source/drain region alongside the gate electrode;
- and
- forming a pair of second isolation regions on two opposing sides of the first isolation region,
- wherein the first isolation region and the pair of second isolation regions have a first doping type, and a doping concentration of the pair of second isolation regions is lower than that of the first isolation region, and
- wherein the forming of the pair of transistor devices further comprises:
- forming a first sacrificial gate line over the first isolation region and a pair of second sacrificial gate lines over the active area;
- forming a side spacer alongside the first sacrificial gate line and each of the pair of second sacrificial gate lines;
- and
- forming a plurality of source/drain regions over the substrate alongside each of the pair of second sacrificial gate lines.
Dependencies are inferred from the claim text.