Three-dimensional semiconductor memory device and method of manufacturing the same

A three-dimensional (3D) semiconductor memory device comprising:

• a substrate comprising a cell array region, a first connection region and a second connection region spaced apart from each other in a first direction, the cell array region being interposed between the first connection region and the second connection region, the first connection region comprising a first pad region and a second pad region arranged in a second direction, the second direction intersecting the first direction, and the second connection region comprising a third pad region and a fourth pad region arranged in the second direction;
• an electrode structure comprising a plurality of electrodes vertically stacked on the substrate;
• and
• a plurality of dummy structures, the plurality of dummy structures comprising a first dummy structure disposed on the first pad region, a second dummy structure disposed on the second pad region, a third dummy structure disposed on the third pad region and a fourth dummy structure disposed on the fourth pad region, wherein each of the plurality of dummy structures comprises dummy patterns vertically stacked on the electrode structure,
• wherein uppermost surfaces of the first, second, third, and fourth dummy structures are located at different levels from the substrate.

A three-dimensional (3D) semiconductor memory device comprising:

• a substrate comprising a cell array region and a connection region adjacent to the cell array region;
• an electrode structure comprising a plurality of electrodes vertically stacked on the substrate, the electrode structure comprising an upper portion having an upper staircase structure formed along a first direction on the connection region;
• a first dummy structure laterally spaced apart from the upper portion of the electrode structure and comprising first dummy patterns vertically stacked;
• and
• a second dummy structure laterally spaced apart from the upper portion of the electrode structure and comprising second dummy patterns vertically stacked,
• wherein each of the first dummy structure and the second dummy structure comprising a dummy staircase structure formed along both the first direction and a second direction, the second direction intersecting the first direction,
• wherein the first dummy structure is located at a first level from the substrate, and the second dummy structure is located at a second level higher than the first level, and
• wherein a lowest step of the dummy staircase structure of the second dummy structure is disposed higher than a highest step of the dummy staircase structure of the first dummy structure.