Staircase structure for memory device

A semiconductor structure, comprising:

• a substrate;
• and
• a staircase structure disposed over the substrate, wherein the staircase structure comprises:
• a plurality of layer stacks, each layer stack comprising a first material layer and a second material layer, wherein the first material layer is disposed over a first portion of the second material layer;
• and
• a plurality of landing pads respectively disposed on the plurality of layer stacks, wherein each landing pad is disposed over a second portion of the second material layer of a respective layer stack of the plurality of layer stacks, and wherein the each landing pad comprises a curved side surface and a substantially straight side surface, wherein the substantially straight side surface is laterally displaced from a side surface of the second portion of the second material layer.

A memory device, comprising:

• a substrate, wherein the substrate comprises a top surface;
• a memory string disposed over the substrate;
• and
• a staircase structure disposed adjacent to the memory string, wherein the staircase structure comprises:
• a plurality of layer stacks, each layer stack comprising an insulating layer disposed over a first portion of a conductive layer, wherein a second portion of the conductive layer comprises a curved side surface in contact with a side surface of the insulating layer.