Ferroelectric memory IC as well as method of operating the same and method of preparing the same
AssigneeFudan University
InventorsAnquan Jiang, Yan Zhang, Zilong Bai
Life of this patent
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Abstract
Disclosed is an integrated circuit for ferroelectric memory, the integrated circuit comprising: a ferroelectric memory array having a storage unit array formed on a ferroelectric single-crystal layer, wherein each ferroelectric memory unit in the ferroelectric memory array is at least formed by one storage unit in the storage unit array, or at least formed by one storage unit in the storage unit array and one transistor formed on a silicon substrate of a silicon-based reading and writing circuit that is electrically connected to the storage unit.
Claims23
An integrated circuit for ferroelectric memory, the integrated circuit comprising:
- a ferroelectric memory array having a storage unit array formed on a ferroelectric single-crystal layer, the storage unit array comprising at least one storage unit;
- and
- a silicon-based reading and writing circuit;
- wherein each storage unit in the storage unit array is correspondingly provided with a first electrode and a second electrode, and a polarization direction of the electric domain of the ferroelectric single-crystal layer is substantially not parallel with a normal direction of the ferroelectric single-crystal layer;
- wherein when an electrical signal is applied between the first electrode and the second electrode, the electric domain of the ferroelectric single-crystal layer for forming the storage unit and substantially located between the first electrode and the second electrode can be reversed, thus enabling establishment of a domain wall conductive passage which connects the first electrode with the second electrode;
- and
- wherein each ferroelectric memory unit in the ferroelectric memory array is at least formed by one storage unit in the storage unit array, or at least formed by one storage unit in the storage unit array and one transistor formed on the silicon substrate of the silicon-based reading and writing circuit and electrically connected to the storage unit.
A ferroelectric memory array, wherein the ferroelectric memory array comprises a storage unit array formed on a ferroelectric single-crystal layer, the storage unit array comprising at least one storage unit;
- wherein each storage unit in the storage unit array is correspondingly provided with a first electrode and a second electrode, and a polarization direction of the electric domain of the ferroelectric single-crystal layer is substantially not parallel with a normal direction of the ferroelectric single-crystal layer;
- wherein when an electrical signal is applied between the first electrode and the second electrode, the electric domain of the ferroelectric single-crystal layer for forming the storage unit and substantially located between the first electrode and the second electrode is reversed, thus enabling establishment of a domain wall conductive passage which connects the first electrode with the second electrode;
- and
- wherein each ferroelectric memory unit in the ferroelectric memory array is at least formed by one storage unit in the storage unit array.
Dependencies are inferred from the claim text.