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US 11,145,662 B2Granted
Memory structure
AssigneePowerchip Semiconductor Manufacturing Corporation
InventorShun-Hao Chao
Life of this patent
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Abstract
A memory structure including a substrate, a first transistor, a second transistor, and a trench capacitor is provided. The trench capacitor is disposed in the substrate and is connected between the first transistor and the second transistor.
Claims9
A memory structure, comprising:
- a substrate;
- a first transistor and a second transistor;
- a trench capacitor disposed in the substrate and connected between the first transistor and the second transistor, wherein the substrate has a trench, and the trench capacitor comprises:
- a first electrode disposed in the substrate around the trench;
- a second electrode disposed in the trench;
- and
- a dielectric structure located between the second electrode and the first electrode and between the second electrode and the substrate, wherein the dielectric structure is not present between an upper portion of the second electrode and the substrate;
- a first doped region located in the substrate on one side of the trench and connected to the upper portion of the second electrode;
- and
- a second doped region located in the substrate on another side of the trench and connected to the upper portion of the second electrode, wherein
- the first transistor comprises:
- a first gate disposed on the substrate and insulated from the substrate;
- and
- a third doped region and a fourth doped region located in the substrate on two sides of the first gate, wherein the fourth doped region is connected to the first doped region, and
- the second transistor comprises:
- a second gate disposed on the substrate and insulated from the substrate;
- and
- a fifth doped region and a sixth doped region located in the substrate on two sides of the second gate, wherein the fifth doped region is connected to the second doped region.
15 more elements
Dependencies are inferred from the claim text.