Semiconductor structures with deep trench capacitor and methods of manufacture

A method in a computer-aided design system for generating a functional design model of an integrated circuit and deep trench capacitor structure using a computer readable hardware storage device in a computing device for manufacturing the integrated circuit and the deep trench capacitor structure, the method comprising:

• generating a functional representation of a physical structure of the integrated circuit and the deep trench capacitor structure, using the computing device, of a plurality of deep trench capacitors having a fin structure;
• generating a functional representation of the physical structure of the integrated circuit and the deep trench capacitor structure, using the computing device, of a plurality of SOI fins;
• and
• generating a functional representation of an epitaxial material connecting the plurality of SOI fins with the respective fin structures of the deep trench capacitors;
• and
• manufacturing the physical structure of the integrated circuit, the deep trench capacitor structure which includes the plurality of deep trench capacitors, and the plurality of SOI fins,
• wherein the epitaxial material comprises semiconductor material over exposed sidewalls of the respective fin structures and semiconductor material of the SOI fins, and
• a portion of the deep trench capacitors includes a dielectric material lining a trench, a metal layer on the dielectric material, and remaining portions of the trench filled with polysilicon material.