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US 11,145,640 B2Granted
Integrated circuit (IC) device
AssigneeSamsung Electronics Co., Ltd.
InventorsHyun-jo Kim, Joong-won Jeon
Life of this patent
Estimating the term…
Abstract
Provided is an integrated circuit (IC) device including a logic cell having an area defined by a cell boundary. The logic cell includes a first device region, a device isolation region, and a second device region. The first device region and the second device region are arranged apart from each other in a first direction that is perpendicular to a second direction. The device isolation region is between the first device region and the second device region. A first maximum length of the first device region in the second direction is less than a width of the cell boundary in the second direction, and a second maximum length of the second device region is substantially equal to the width of the cell boundary in the second direction.
Claims20
An integrated circuit (IC) device comprising:
- a pair of first fin-type active regions each extending in a width direction along a first straight line on a substrate;
- a first fin separation insulating portion interposed between the pair of first fin-type active regions, the first fin separation insulating portion having a first lowermost surface;
- a pair of second fin-type active regions each extending in the width direction along a second straight line on the substrate,
- the pair of second fin-type active regions being spaced apart from the pair of first fin-type active regions in a height direction perpendicular to the width direction;
- and
- a second fin separation insulating portion interposed between the pair of second fin-type active regions, the second fin separation insulating portion having a second lowermost surface lower than the first lowermost surface.
3 more elements
An integrated circuit (IC) device comprising:
- a substrate including a pair of first device regions and a pair of second device regions, wherein the pair of first device regions are adjacent to each other in a width direction and the pair of second device regions are adjacent to each other in the width direction;
- a first fin separation insulating portion interposed between the pair of first device regions, the first fin separation insulating portion having a first lowermost surface;
- a second fin separation insulating portion interposed between the pair of second device regions, the second fin separation insulating portion having a second lowermost surface closer to the substrate than the first lowermost surface;
- a first fin-type active region extending in the width direction on one of the pair of first device regions, the first fin-type active region having a first end facing the first fin separation insulating portion, the first fin-type active region protruding from an upper surface of the pair of first device regions;
- a second fin-type active region extending in the width direction on one of the pair of second device regions, the second fin-type active region having a second end facing the second fin separation insulating portion, the second fin-type active region protruding from an upper surface of the pair of second device regions, and the second fin-type active region being spaced apart from the first fin separation insulating portion in a height direction;
- a first gate structure extending in the height direction perpendicular to the width direction over the first fin-type active region;
- and
- a second gate structure extending in the height direction over the second fin-type active region,
- wherein the one of the pair of first device regions and the one of the pair of second device regions have different lengths in the width direction.
6 more elements
An integrated circuit (IC) device comprising:
- a substrate including a first device region and a second device region spaced apart from each other, wherein the first device region and the second device region have different lengths in a width direction;
- a first fin-type active region extending in the width direction on the first device region, the first fin-type active region protruding from an upper surface of the first device region;
- a second fin-type active region extending in the width direction on the second device region, the second fin-type active region protruding from an upper surface of the second device region;
- a plurality of first gate structures extending in a height direction perpendicular to the width direction over the first fin-type active region;
- a plurality of second gate structures extending in the height direction over the second fin-type active region;
- a first fin separation insulating portion adjacent to the first device region in the width direction, the first fin separation insulating portion having a first sidewall contacting a first end of the first fin-type active region and a first lowermost surface facing the substrate, the first fin separation insulating portion being spaced apart in the height direction from the second fin-type active region;
- and
- a second fin separation insulating portion adjacent to the second device region in the width direction, the second fin separation insulating portion having a second sidewall contacting a second end of the second fin-type active region and a second lowermost surface facing the substrate, the second lowermost surface being closer to the substrate than the first lowermost surface.
5 more elements
Dependencies are inferred from the claim text.