Semiconductor device package and method for manufacturing the same

A semiconductor device package, comprising:

• a substrate comprising a circuit layer, the substrate including a first surface and a second surface opposite to the first surface, wherein the substrate defines at least one cavity through the substrate;
• a stacked structure comprising:
• a first semiconductor die disposed on the first surface and electrically connected on the circuit layer;
• at least one second semiconductor die stacked on the first semiconductor die and electrically connected to the first semiconductor die, wherein the second semiconductor die is at least partially inserted into the cavity;
• an encapsulation layer disposed in the cavity, at least entirely encapsulating the second semiconductor die and at least a portion of a sidewall of the first semiconductor die, wherein the encapsulation layer includes a through hole exposing the circuit layer;
• and
• an electrical conductor disposed in the through hole and in contact with the circuit layer.

A method of manufacturing a semiconductor device package, comprising:

• receiving a substrate defining a cavity;
• receiving a stacked structure comprising a first semiconductor die and at least one second semiconductor die stacked on the first semiconductor die;
• bonding the first semiconductor die to a first surface of the substrate with the second semiconductor die at least being partially inserted into the cavity;
• filling a molding material in the cavity to form an encapsulation layer in the cavity to at least entirely encapsulate the second semiconductor die subsequent to bonding the first semiconductor die to the first surface of the substrate with the second semiconductor die at least being partially inserted into the cavity;
• forming a recess from the second surface of the substrate to expose a bonding pad of a circuit layer of the substrate;
• and
• forming an electrical conductor in the recess and in contact with the bonding pad.