Multi-layer passivation structure and method
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChih-Fan Huang, Hui-Chi Chen, Kuo-Chin Chang, Dian-Hau Chen, Yen-Ming Chen
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Abstract
Semiconductor devices, integrated circuits and methods of forming the same are provided. In one embodiment, a method for integrated circuit (IC) fabrication includes forming a passivation layer over a first contact feature, forming a second contact feature over and through the passivation layer to electrically connect to the first contact feature, and forming a multi-layer passivation structure over the second contact feature and over the passivation layer. Forming the multi-layer passivation structure includes depositing a first nitride layer, an oxide layer over the first nitride layer, and a second nitride layer over the oxide layer.
Claims20
A method for integrated circuit (IC) fabrication, comprising:
- forming a passivation layer over a first contact feature, the passivation layer comprising:
- a lower dielectric layer over the first contact feature;
- a metal-insulator-metal (MIM) structure over the lower dielectric layer;
- and
- an upper dielectric layer over the MIM structure;
- forming a second contact feature comprising a first portion over a top surface of the upper dielectric layer and a second portion extending through the passivation layer, the second contact feature being electrically connected to the first contact feature, wherein a sidewall of the first portion and the top surface of the upper dielectric layer form an acute angle;
- and
- after the forming of the second contact feature, forming a multi-layer passivation structure over the second contact feature and over the passivation layer.
A method, comprising:
- forming a top metal (TM) contact over a semiconductor substrate;
- depositing a first dielectric layer over the TM contact;
- forming a metal-insulator-metal (MIM) structure over the first dielectric layer;
- depositing a second dielectric layer over the MIM structure;
- forming an opening in the first dielectric layer and the second dielectric layer to expose the TM contact;
- depositing a metal layer over the second dielectric layer and in the opening;
- after the depositing of the metal layer, patterning the metal layer to form a contact feature that is electrically coupled to the MIM structure and to the TM contact, the contact feature comprising a metal via in the opening and an upper portion over a top surface of the second dielectric layer;
- after the patterning of the metal layer, forming a passivation structure over the contact feature and the second dielectric layer, wherein forming the passivation structure comprises:
- depositing a first silicon nitride (SiN) layer over the contact feature and the second dielectric layer;
- depositing an oxide layer over the first SiN layer;
- and
- depositing a second SiN layer over the oxide layer;
- and
- forming a bonding pad that is electrically coupled to the contact feature.
A method, comprising:
- forming a metal contact over a semiconductor substrate;
- forming a first passivation structure over the metal contact;
- forming an opening through the first passivation structure to expose the metal contact;
- forming a contact feature over the opening, wherein a lower portion of the contact feature extends through the first passivation structure and an upper portion of the contact feature is above and in direct contact with a top surface of the first passivation structure, wherein a width of a top surface of the upper portion is smaller than a width of a bottom surface of the upper portion, wherein the upper portion comprises a taper footing profile to reduce stress concentrated at corners of the contact feature;
- and
- after the forming of the contact feature, forming a second passivation structure over the contact feature and the first passivation structure, wherein the second passivation structure comprises a first silicon nitride layer, a silicon oxide layer over the first silicon nitride layer, and a second silicon nitride layer over the silicon oxide layer.
Dependencies are inferred from the claim text.