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US 11,145,538 B2Granted
High resistivity silicon-on-insulator structure and method of manufacture thereof
AssigneeGlobalWafers Co., Ltd.
InventorsJeffery L. Libbert, Qingmin Liu, Gang Wang, Andrew M. Jones
Life of this patent
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Abstract
A multilayer structure is provided, the multilayer structure comprising a semiconductor on insulator structure comprises an insulating layer that enhances the stability of the underlying charge trapping layer.
Claims24
A method of preparing a multilayer structure, the method comprising:
- depositing a charge trapping layer on a front surface of a single crystal semiconductor handle substrate, wherein the single crystal semiconductor handle substrate comprises two major, generally parallel surfaces, one of which is the front surface of the single crystal semiconductor handle substrate and the other of which is a back surface of the single crystal semiconductor handle substrate, an imaginary central plane between the front surface and the back surface, a circumferential edge joining the front and back surfaces of the single crystal semiconductor handle substrate, and a bulk region between the front and back surfaces of the single crystal semiconductor handle substrate, wherein the single crystal semiconductor handle substrate has a minimum bulk region resistivity of at least about 500 ohm-cm and further wherein the charge trapping layer comprises polycrystalline silicon and has a minimum resistivity of at least about 1000 ohm-cm;
- depositing an insulating layer comprising silicon nitride or silicon oxynitride on the charge trapping layer comprising the polycrystalline silicon layer;
- and
- bonding a dielectric layer in interfacial contact with a front surface of a single crystal semiconductor donor substrate to the insulating layer to thereby form a bonded structure, wherein the single crystal semiconductor donor substrate comprises two major, generally parallel surfaces, one of which is the front surface of the semiconductor donor substrate and the other of which is a back surface of the semiconductor donor substrate, a circumferential edge joining the front and back surfaces of the semiconductor donor substrate, a central plane between the front and back surfaces of the semiconductor donor substrate, and a bulk region between the front and back surfaces of the semiconductor donor substrate, and further wherein the single crystal semiconductor donor substrate comprises a cleave plane.
1 more element
Dependencies are inferred from the claim text.