Gate isolation plugs structure and method
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWen-Shuo Hsieh, Shih-Chang Tsai, Chih-Han Lin, Te-Yung Liu
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Abstract
A method of forming a gate isolation plug for FinFETs includes forming an elongated gate, forming first and second spacers in contact with first and second sidewalls of the elongated gate, separating the elongated gate into first and second gate portions using first and second etching steps, and forming a gate isolation plug between the first and second gate portions, wherein a length of the gate isolation plug is greater than a length of either of the first or second gate portions.
Claims20
A device comprising:
- an elongated gate comprising a first length;
- a first elongated dielectric spacer adjacent to a first sidewall of the elongated gate, and a second elongated dielectric spacer adjacent to a second sidewall of the elongated gate;
- a gate isolation plug dividing the elongated gate into a first gate portion and a second gate portion, wherein the gate isolation plug completely isolates the first gate portion from the second gate portion, and wherein the gate isolation plug only partially extends into the first and second elongated dielectric spacers;
- a first Fin Field-Effect Transistor (FinFET) comprising a first semiconductor fin, wherein the first gate portion crosses over the first semiconductor fin;
- and
- a second FinFET comprising a second semiconductor fin, wherein the second gate portion crosses over the second semiconductor fin.
A device comprising:
- a first gate crossing over a first semiconductor fin;
- a second gate crossing over a second semiconductor fin;
- a first spacer layer in contact with a first sidewall of the first gate and a first sidewall of the second gate, the first spacer layer having a first portion, a second portion, and a third portion interposed between the first portion and the second portion, the first portion being in contact with the first sidewall of the first gate, the second portion being in contact with the first sidewall of the second gate, the third portion having a first sidewall;
- a second spacer layer in contact with a second sidewall of the first gate and a second sidewall of the second gate, the second spacer layer having a fourth portion, a fifth portion, and a sixth portion interposed between the fourth portion and the fifth portion, the fourth portion being in contact with the second sidewall of the first gate, the fifth portion being in contact with the second sidewall of the second gate, the sixth portion having a second sidewall;
- and
- a gate isolation plug between the first gate and the second gate, wherein the gate isolation plug extends from the first sidewall of the first spacer layer to the second sidewall of the second spacer layer, wherein the gate isolation plug attains a maximum length along a line through a center point of the gate isolation plug and orthogonal to a longitudinal axis of the first and second gates, and wherein the first sidewall of the third portion and the second sidewall of the sixth portion have a concave shape.
A device comprising:
- first and second gates;
- a first dielectric spacer in contact with a first sidewall of the first gate and a first sidewall of the second gate;
- a second dielectric spacer in contact with a second sidewall of the first gate and a second sidewall of the second gate;
- and
- a gate isolation plug between the first and second gates, wherein a first end portion of the gate isolation plug is in contact with a concave sidewall of the first dielectric spacer, and wherein a second end portion of the gate isolation plug is in contact with a concave sidewall of the second dielectric spacer.
Dependencies are inferred from the claim text.