FinFET device over convex insulating structure

A semiconductor device comprising:

• a substrate;
• a first fin field-effect transistor (FinFET) comprising:
• a first fin over a first region of the substrate;
• a first gate electrode over the first fin;
• and
• a first gate dielectric layer between the first gate electrode and the first fin;
• a second FinFET comprising:
• a second fin over a second region of the substrate;
• a second gate electrode over the second fin;
• and
• a second gate dielectric layer between the second gate electrode and the second fin;
• a first insulating structure over the first region of the substrate, adjacent the first fin, and having a topmost surface lower than a topmost surface of the first fin, wherein the topmost surface of the first insulating structure is convex;
• and
• a second insulating structure over the second region of the substrate, adjacent the second fin, and having a topmost surface lower than a topmost surface of the second fin, wherein the topmost surface of the second insulating structure is higher than the topmost surface of the first insulating structure.

A semiconductor device comprising:

• a substrate;
• a first fin field-effect transistor (FinFET) comprising:
• a first fin over a first region of the substrate;
• a first gate electrode over the first fin;
• and
• a first gate dielectric layer between the first gate electrode and the first fin and in contact with the first fin;
• a first insulating structure laterally surrounding the first fin;
• a second FinFET comprising:
• a second fin over a second region of the substrate;
• a second gate electrode over the second fin;
• and
• a second gate dielectric layer between the second gate electrode and the second fin and in contact with the second fin, wherein a bottom of the first gate dielectric layer is lower than a bottom of the second gate dielectric layer;
• a second insulating structure laterally surrounding the second fin, wherein an interface between the first insulating structure and the first gate dielectric layer is lower than an interface between the second insulating structure and the second gate dielectric layer;
• and
• a third fin embedded in the first insulating structure, wherein a portion of a top surface of the first insulating structure directly above the third fin is inclined with respect to a bottom surface of the first insulating structure.