Calibration circuit for controlling resistance of output driver circuit, memory device including the same, and operating method of the memory device

A calibration circuit configured to control an off chip driver (OCD)/on die termination (ODT) circuit, the calibration circuit comprising:

• a pull-up resistor block connected to an external calibration resistor through a pad and comprising at least one pull-up resistor set each connected to a power source voltage;
• a first code generator configured to generate a pull-up code for controlling a pull-up circuit in the OCD/ODT circuit, based on a comparison operation comparing a voltage of one node of the pull-up resistor block and a calibration reference voltage;
• a replica pull-up resistor block comprising a plurality of pull-up resistor sets connected to the power source voltage;
• a pull-down resistor block comprising a pull-down resistor set connected to a ground voltage;
• and
• a second code generator configured to generate a pull-down code for controlling a pull-down circuit in the OCD/ODT circuit, based on a comparison operation comparing a voltage of a node between the replica pull-up resistor block and the pull-down resistor block and the calibration reference voltage,
• wherein, in a calibration operation, when a number of enabled pull-up resistor sets in the pull-up resistor block differs from a number of enabled pull-up resistor sets in the replica pull-up resistor block, the pull-up code and the pull-down code have code values by which the pull-up circuit and the pull-down circuit in the OCD/ODT circuit are set to have different resistance values.

An operating method of a memory device, the operating method comprising:

• entering a calibration mode;
• generating a pull-up code such that a resistance value of a pull-up resistor block has a value corresponding to an external calibration resistor, through a pull-up code generator connected to the external calibration resistor and the pull-up resistor block during a first calibration operation;
• generating a pull-down code such that a resistance value of a pull-down resistor block has a value corresponding to a resistance value of a replica pull-up resistor block which receives the pull-up code, through a pull-down code generator connected to a node between the replica pull-up resistor block and the pull-down resistor block during a second calibration operation,
• wherein when the resistance value of the replica pull-up resistor block is adjusted to be less than the resistance value of the pull-up resistor block, a resistance value of the pull-down circuit in the OCD/ODT circuit is adjusted to be less than a resistance value of the pull-up circuit in the OCD/ODT circuit;
• and
• providing the pull-up code and the pull-down code to a pull-up circuit and a pull-down circuit, respectively, in an off chip driver (OCD)/on die termination (ODT) circuit, after the calibration mode ends,
• wherein a code value of the pull-down code varies according to a change in the resistance value of the replica pull-up resistor block.