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US 11,145,354 B2Granted
Apparatuses and methods to perform duty cycle adjustment with back-bias voltage
AssigneeMicron Technology, Inc.
InventorsMichael V. Ho, Myung Ho Bae
Life of this patent
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Abstract
An exemplary semiconductor device includes a clock generator circuit configured to generate a clock signal, and a duty cycle adjustment circuit configured to receive the clock signal. The duty cycle adjustment circuit includes an adjuster circuit configured to receive a back-bias voltage and to adjust a duty cycle of the clock signal based on the back-bias voltage to provide an output dock signal.
Claims19
A duty cycle adjustment circuit comprising:
- an adjuster circuit configured to receive a back-bias voltage and a clock signal, wherein the adjustor circuit is configured to adjust a duty cycle of the clock signal based on the back-bias voltage and a mode register setting to provide an output clock signal.
A method comprising:
- receiving, at a duty cycle adjustment circuit a clock signal and a back-bias voltage, wherein the back-bias voltage includes a supply voltage adjusted by a bias voltage amount;
- and
- adjusting a duty cycle of the clock signal based on a duty cycle adjustment amount and the back-bias voltage to provide an output clock signal, wherein the duty cycle adjustment amount is based on a mode register setting.
Dependencies are inferred from the claim text.