Semiconductor devices

A semiconductor device comprising:

• an error check and scrub (ECS) command generation circuit configured to generate an ECS command by controlling a speed of a counting operation performed based on a refresh command or a bank refresh command, according to a temperature and a refresh mode of the semiconductor device;
• and
• an ECS control circuit configured to sequentially generate an ECS active command, an ECS read command, an ECS write command, an ECS pre-charge command, and an end signal based on the ECS command,
• wherein the refresh mode includes a fine granularity refresh (FGR) mode, and the temperature includes a high temperature over a certain temperature.

A semiconductor device comprising:

• a fine granularity refresh (FGR) command generation circuit configured to generate an FGR command when all bit signals of the refresh command or the bank refresh command are generated in an FGR mode;
• a pre-count flag generation circuit configured to generate a pre-count flag when the refresh command is generated in a non-FGR mode or when the FGR command is generated ‘2M’ times in the FGR mode;
• a count flag generation circuit configured to generate a count flag when the pre-count flag is generated at a low temperature, the low temperature being below a certain temperature, or when the pre-count flag is generated ‘2N’ times at a high temperature, the high temperature being above the certain temperature;
• an external ECS command generation circuit configured to count the count flag to generate an external ECS command;
• and
• an ECS command selection circuit configured to output the external ECS command as an ECS command for controlling an ECS operation based on a command selection signal,
• wherein the numbers ‘M’ and ‘N’ are natural numbers.

A semiconductor device comprising:

• an error check and scrub (ECS) command generation circuit configured to generate an ECS command by performing a counting operation based on a periodic signal;
• and
• an ECS control circuit configured to sequentially generate an ECS active command, an ECS read command, an ECS write command, an ECS pre-charge command, and an end signal based on the ECS command,
• wherein the ECS command generation circuit includes an internal ECS command generation circuit configured to count the periodic signal to generate an internal ECS command, and an ECS command selection circuit configured to output the internal ECS command as the ECS command based on a command selection signal.