Memory device for refreshing redundancy area word lines, and refresh method thereof
AssigneeWinbond Electronics Corp.
InventorShinya Okuno
Life of this patent
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Abstract
A memory device and a refresh method thereof are provided. The memory device includes a memory array and a controller. The memory array includes a plurality of normal areas and a redundancy area near the plurality of normal areas. The redundancy area includes a plurality of redundancy word lines. A plurality of boundary word lines are arranged near boundaries between the plurality of normal areas and the redundancy area. The controller refreshes the plurality of redundancy word lines in sequence, and refreshes the plurality of boundary word lines in sequence after refreshing the plurality of redundancy word lines in sequence.
Claims13
A memory device, comprising:
- a memory array, comprising a plurality of normal areas and a redundancy area near the normal areas, each of the normal areas comprises a boundary normal word line adjacent to the redundancy area, the redundancy area comprising a plurality of middle redundancy word lines and a plurality of boundary redundancy word lines adjacent to the normal areas;
- and
- a controller, coupled to the memory array, and configured to refresh all of the middle redundancy word lines in the redundancy area, the boundary normal word lines adjacent to the redundancy area and all of the boundary redundancy word lines in the redundancy area according to a refresh timing sequence determined by a refresh status signal,
- wherein the controller comprises:
- a redundancy area refresh address control circuit, configured to receive an auto-refresh command signal, and generate a plurality of redundancy area refresh addresses in sequence according to a redundancy flag, the refresh status signal, a plurality of middle redundancy word line addresses, a plurality of boundary redundancy word line addresses, and a plurality of boundary normal word line addresses,
- wherein the redundancy area refresh addresses are configured to indicate all of the middle redundancy word lines in the redundancy area, the boundary normal word lines adjacent to the redundancy area and all of the boundary redundancy word lines in the redundancy area,
- wherein the redundancy area refresh address control circuit comprises:
- an auto-refresh command counter, configured to receive the auto-refresh command signal, and counts a pulse ordinal number of the auto-refresh command signal to generate a cumulative pulse number of the auto-refresh command signal, and generate pulses of the redundancy flag whenever the cumulative pulse number of the auto-refresh command signal is equal to a first number.
A refresh method of a memory device, the memory device comprising a memory array and a controller, the memory array comprising a plurality of normal areas and a redundancy area near the normal areas, each of the normal areas comprises a boundary normal word line adjacent to the redundancy area, the redundancy area comprises a plurality of middle redundancy word lines and a plurality of boundary redundancy word lines adjacent to the normal areas, and, the refresh method comprising:
- refreshing all of the middle redundancy word lines in the redundancy area, the boundary normal word lines adjacent to the redundancy area and all of the boundary redundancy word lines in the redundancy area according to a refresh timing sequence determined by a refresh status signal,
- the refresh method further comprises:
- receiving an auto-refresh command signal, and counting a pulse ordinal number of the auto-refresh command signal to generate a cumulative pulse number of the auto-refresh command signal, and generating pulses of a redundancy flag whenever the cumulative pulse number of the auto-refresh command signal is equal to a first number;
- and
- generating a plurality of redundancy area refresh addresses in sequence according to the redundancy flag, the refresh status signal, a plurality of middle redundancy word line addresses, a plurality of boundary redundancy word line addresses, and a plurality of boundary normal word line addresses,
- wherein the redundancy area refresh addresses are configured to indicate all of the middle redundancy word lines in the redundancy area, the boundary normal word lines adjacent to the redundancy area and all of the boundary redundancy word lines in the redundancy area.
Dependencies are inferred from the claim text.