Memory device and memory circuit

A memory device, comprising:

• a spin-orbit torque (SOT) layer;
• a magnetic tunnel junction (MTJ), standing on the SOT layer;
• a read word line, connected to the MTJ with a read selector in between, wherein the read word line is electrically connected to the MTJ when the read selector is turned on, and the read word line is electrically disconnected from the MTJ when the read selector is in an off state;
• and
• a write word line, connected to the SOT layer with a write selector in between, wherein the write word line is electrically connected to the SOT layer when the write selector is turned on, the write word line is electrically disconnected from the SOT layer when the write selector is in an off state, and wherein a turn-on voltage of the write selector is greater than a turn-on voltage of the read selector.

A memory circuit, comprising:

• magnetoresistive storage units, arranged as an array;
• read word lines, respectively connecting to a row of the magnetoresistive storage units through read selectors, wherein each read selector is a two-terminal device with a terminal connected to one of the magnetoresistive storage units and the other terminal connected to one of the read word lines;
• write word lines, respectively connecting to a row of the magnetoresistive storage units through write selectors, wherein each write selector is a two-terminal device with a terminal connected to one of the magnetoresistive storage units and the other terminal connected to one of the write word lines, and a turn-on voltage of the write selector is greater than a turn-on voltage of the read selectors;
• and
• bit lines, respectively connecting to a column of the magnetoresistive storage units.