Vertical decoders
AssigneeMicron Technology, Inc.
InventorAndrea Redaelli
Life of this patent
Estimating the term…
Abstract
Methods, systems, and devices for a decoder are described. The memory device may include a substrate, an array of memory cells coupled with the substrate, and a decoder coupled with the substrate. The decoder may include a doped material that may extend between a first conductive line and an access line of the array of memory cells in a first direction (e.g., away from a surface of the substrate) and the doped material may be configured to selectively couple the first conductive line of the decoder with the access line of the array of memory cells. The access line may be coupled with two decoders, in some cases.
Claims20
A memory device, comprising:
- a substrate;
- an array of memory cells coupled with the substrate and comprising a plurality of access lines;
- and
- a set of decoders configured to apply voltages to the plurality of access lines on four sides of the array of memory cells, each decoder configured to apply a voltage on a separate one of the four sides.
A memory device, comprising:
- a substrate;
- an array of memory cells coupled with the substrate and comprising a first set of access lines and a second set of access lines;
- a first pair of decoders coupled with the substrate and configured to apply voltages to the first set of access lines as part of an access operation;
- and
- a second pair of decoders coupled with the substrate and configured to apply voltages to the second set of access lines as part of the access operation.
A method, comprising:
- receiving an access command comprising an instruction to perform an access operation on a memory cell;
- identifying a first pair of decoders configured to apply a first access voltage to a first access line coupled with the memory cell as part of the access operation based at least in part on receiving the access command;
- and
- applying, by the first pair of decoders on first opposite sides of the memory cell, the first access voltage to the first access line coupled with the memory cell as part of the access operation of the memory cell based at least in part on identifying the first pair of decoders;
- identifying a second pair of decoders configured to apply a second access voltage to a second access line coupled with the memory cell as part of the access operation based at least in part on receiving the access command;
- and
- applying, by the second pair of decoders on second opposite sides of the memory cell that are different than the first opposite sides, the second access voltage to the second access line coupled with the memory cell as part of the access operation of the memory cell based at least in part on identifying the second pair of decoders.
Dependencies are inferred from the claim text.