Latch-up prevention circuit for memory storage system
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsSungchieh Lin, Kuoyuan (Peter) Hsu
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsSungchieh Lin, Kuoyuan (Peter) Hsu
Estimating the term…
Various embodiments for configurable memory storage systems are disclosed. The configurable memory storages selectively choose an operational voltage signal from among multiple operational voltage signals to dynamically control various operational parameters. For example, the configurable memory storage systems selectively choose a maximum operational voltage signal from among the multiple operational voltage signals to maximize read/write speed. As another example, the configurable memory storage systems selectively choose a minimum operational voltage signal from among the multiple operational voltage signals to minimize power consumption. Moreover, the configurable memory storage systems selectively provide the maximum operational voltage signal to bulk (B) terminals of some of their transistors to prevent latch-up of these transistors. In some situations, the configurable memory storage systems can dynamically adjust the maximum operational voltage signal to compensate for fluctuations in the maximum operational voltage signal.
Latch-up prevention circuitry for a memory storage system, the latch-up prevention circuitry comprising:
A method for preventing latch-up of a memory storage system, the method comprising:
Dependencies are inferred from the claim text.